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hv: refine functions name

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Make the name of the functions more accurate

Tracked-On: #4433

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Yuan Liu 2020-03-04 15:28:40 +08:00 committed by Eddie Dong
parent 7c82efb938
commit e1ca1ae2e9
3 changed files with 28 additions and 28 deletions
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8
hypervisor/dm/vpci/vhostbridge.c
View File

@ -99,7 +99,7 @@ static void deinit_vhostbridge(__unused struct pci_vdev *vdev)
* @pre vdev->vpci != NULL * @pre vdev->vpci != NULL
* @pre vdev->vpci->vm != NULL * @pre vdev->vpci->vm != NULL
*/ */
static int32_t vhostbridge_read_cfg(const struct pci_vdev *vdev, uint32_t offset, static int32_t read_vhostbridge_cfg(const struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t *val) uint32_t bytes, uint32_t *val)
{ {
*val = pci_vdev_read_cfg(vdev, offset, bytes); *val = pci_vdev_read_cfg(vdev, offset, bytes);
@ -112,7 +112,7 @@ static int32_t vhostbridge_read_cfg(const struct pci_vdev *vdev, uint32_t offset
* @pre vdev->vpci != NULL * @pre vdev->vpci != NULL
* @pre vdev->vpci->vm != NULL * @pre vdev->vpci->vm != NULL
*/ */
static int32_t vhostbridge_write_cfg(struct pci_vdev *vdev, uint32_t offset, static int32_t write_vhostbridge_cfg(struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t val) uint32_t bytes, uint32_t val)
{ {
if (!is_bar_offset(PCI_BAR_COUNT, offset)) { if (!is_bar_offset(PCI_BAR_COUNT, offset)) {
@ -124,6 +124,6 @@ static int32_t vhostbridge_write_cfg(struct pci_vdev *vdev, uint32_t offset,
const struct pci_vdev_ops vhostbridge_ops = { const struct pci_vdev_ops vhostbridge_ops = {
.init_vdev = init_vhostbridge, .init_vdev = init_vhostbridge,
.deinit_vdev = deinit_vhostbridge, .deinit_vdev = deinit_vhostbridge,
.write_vdev_cfg = vhostbridge_write_cfg, .write_vdev_cfg = write_vhostbridge_cfg,
.read_vdev_cfg = vhostbridge_read_cfg, .read_vdev_cfg = read_vhostbridge_cfg,
}; };

40
hypervisor/dm/vpci/vpci.c
View File

@ -39,15 +39,15 @@
static void vpci_init_vdevs(struct acrn_vm *vm); static void vpci_init_vdevs(struct acrn_vm *vm);
static void deinit_prelaunched_vm_vpci(struct acrn_vm *vm); static void deinit_prelaunched_vm_vpci(struct acrn_vm *vm);
static void deinit_postlaunched_vm_vpci(struct acrn_vm *vm); static void deinit_postlaunched_vm_vpci(struct acrn_vm *vm);
static int32_t read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t *val); static int32_t vpci_read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t *val);
static int32_t write_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val); static int32_t vpci_write_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val);
static struct pci_vdev *find_vdev(struct acrn_vpci *vpci, union pci_bdf bdf); static struct pci_vdev *find_vdev(struct acrn_vpci *vpci, union pci_bdf bdf);
/** /**
* @pre vcpu != NULL * @pre vcpu != NULL
* @pre vcpu->vm != NULL * @pre vcpu->vm != NULL
*/ */
static bool pci_cfgaddr_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes) static bool vpci_pio_cfgaddr_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
{ {
uint32_t val = ~0U; uint32_t val = ~0U;
struct acrn_vpci *vpci = &vcpu->vm->vpci; struct acrn_vpci *vpci = &vcpu->vm->vpci;
@ -70,7 +70,7 @@ static bool pci_cfgaddr_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t by
* @retval true on success. * @retval true on success.
* @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM) * @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM)
*/ */
static bool pci_cfgaddr_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val) static bool vpci_pio_cfgaddr_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val)
{ {
bool ret = true; bool ret = true;
struct acrn_vpci *vpci = &vcpu->vm->vpci; struct acrn_vpci *vpci = &vcpu->vm->vpci;
@ -120,7 +120,7 @@ static inline bool vpci_is_valid_access(uint32_t offset, uint32_t bytes)
* @retval true on success. * @retval true on success.
* @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM) * @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM)
*/ */
static bool pci_cfgdata_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes) static bool vpci_pio_cfgdata_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
{ {
int32_t ret = 0; int32_t ret = 0;
struct acrn_vm *vm = vcpu->vm; struct acrn_vm *vm = vcpu->vm;
@ -135,7 +135,7 @@ static bool pci_cfgdata_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t by
if (cfg_addr.bits.enable != 0U) { if (cfg_addr.bits.enable != 0U) {
if (vpci_is_valid_access(cfg_addr.bits.reg_num + offset, bytes)) { if (vpci_is_valid_access(cfg_addr.bits.reg_num + offset, bytes)) {
bdf.value = cfg_addr.bits.bdf; bdf.value = cfg_addr.bits.bdf;
ret = read_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, &val); ret = vpci_read_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, &val);
} }
} }
@ -153,7 +153,7 @@ static bool pci_cfgdata_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t by
* @retval true on success. * @retval true on success.
* @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM) * @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM)
*/ */
static bool pci_cfgdata_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val) static bool vpci_pio_cfgdata_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val)
{ {
int32_t ret = 0; int32_t ret = 0;
struct acrn_vm *vm = vcpu->vm; struct acrn_vm *vm = vcpu->vm;
@ -166,7 +166,7 @@ static bool pci_cfgdata_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t b
if (cfg_addr.bits.enable != 0U) { if (cfg_addr.bits.enable != 0U) {
if (vpci_is_valid_access(cfg_addr.bits.reg_num + offset, bytes)) { if (vpci_is_valid_access(cfg_addr.bits.reg_num + offset, bytes)) {
bdf.value = cfg_addr.bits.bdf; bdf.value = cfg_addr.bits.bdf;
ret = write_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, val); ret = vpci_write_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, val);
} }
} }
@ -179,7 +179,7 @@ static bool pci_cfgdata_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t b
* @retval 0 on success. * @retval 0 on success.
* @retval other on false. (ACRN will deliver this MMIO request to DM to handle for post-launched VM) * @retval other on false. (ACRN will deliver this MMIO request to DM to handle for post-launched VM)
*/ */
static int32_t vpci_handle_mmconfig_access(struct io_request *io_req, void *private_data) static int32_t vpci_mmio_cfg_access(struct io_request *io_req, void *private_data)
{ {
int32_t ret = 0; int32_t ret = 0;
struct mmio_request *mmio = &io_req->reqs.mmio; struct mmio_request *mmio = &io_req->reqs.mmio;
@ -202,14 +202,14 @@ static int32_t vpci_handle_mmconfig_access(struct io_request *io_req, void *priv
if (mmio->direction == REQUEST_READ) { if (mmio->direction == REQUEST_READ) {
if (!is_plat_hidden_pdev(bdf)) { if (!is_plat_hidden_pdev(bdf)) {
ret = read_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t *)&mmio->value); ret = vpci_read_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t *)&mmio->value);
} else { } else {
/* expose and pass through platform hidden devices to SOS */ /* expose and pass through platform hidden devices to SOS */
mmio->value = (uint64_t)pci_pdev_read_cfg(bdf, reg_num, (uint32_t)mmio->size); mmio->value = (uint64_t)pci_pdev_read_cfg(bdf, reg_num, (uint32_t)mmio->size);
} }
} else { } else {
if (!is_plat_hidden_pdev(bdf)) { if (!is_plat_hidden_pdev(bdf)) {
ret = write_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t)mmio->value); ret = vpci_write_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t)mmio->value);
} else { } else {
/* expose and pass through platform hidden devices to SOS */ /* expose and pass through platform hidden devices to SOS */
pci_pdev_write_cfg(bdf, reg_num, (uint32_t)mmio->size, (uint32_t)mmio->value); pci_pdev_write_cfg(bdf, reg_num, (uint32_t)mmio->size, (uint32_t)mmio->value);
@ -248,17 +248,17 @@ void vpci_init(struct acrn_vm *vm)
/* PCI MMCONFIG for post-launched VM is fixed to 0xE0000000 */ /* PCI MMCONFIG for post-launched VM is fixed to 0xE0000000 */
pci_mmcfg_base = (vm_config->load_order == SOS_VM) ? get_mmcfg_base() : 0xE0000000UL; pci_mmcfg_base = (vm_config->load_order == SOS_VM) ? get_mmcfg_base() : 0xE0000000UL;
vm->vpci.pci_mmcfg_base = pci_mmcfg_base; vm->vpci.pci_mmcfg_base = pci_mmcfg_base;
register_mmio_emulation_handler(vm, vpci_handle_mmconfig_access, register_mmio_emulation_handler(vm, vpci_mmio_cfg_access,
pci_mmcfg_base, pci_mmcfg_base + PCI_MMCONFIG_SIZE, &vm->vpci, false); pci_mmcfg_base, pci_mmcfg_base + PCI_MMCONFIG_SIZE, &vm->vpci, false);
} }
/* Intercept and handle I/O ports CF8h */ /* Intercept and handle I/O ports CF8h */
register_pio_emulation_handler(vm, PCI_CFGADDR_PIO_IDX, &pci_cfgaddr_range, register_pio_emulation_handler(vm, PCI_CFGADDR_PIO_IDX, &pci_cfgaddr_range,
pci_cfgaddr_io_read, pci_cfgaddr_io_write); vpci_pio_cfgaddr_read, vpci_pio_cfgaddr_write);
/* Intercept and handle I/O ports CFCh -- CFFh */ /* Intercept and handle I/O ports CFCh -- CFFh */
register_pio_emulation_handler(vm, PCI_CFGDATA_PIO_IDX, &pci_cfgdata_range, register_pio_emulation_handler(vm, PCI_CFGDATA_PIO_IDX, &pci_cfgdata_range,
pci_cfgdata_io_read, pci_cfgdata_io_write); vpci_pio_cfgdata_read, vpci_pio_cfgdata_write);
spinlock_init(&vm->vpci.lock); spinlock_init(&vm->vpci.lock);
} }
@ -370,7 +370,7 @@ static void vpci_deinit_pt_dev(struct pci_vdev *vdev)
deinit_vmsi(vdev); deinit_vmsi(vdev);
} }
static int32_t vpci_write_pt_dev_cfg(struct pci_vdev *vdev, uint32_t offset, static int32_t write_pt_dev_cfg(struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t val) uint32_t bytes, uint32_t val)
{ {
if (vbar_access(vdev, offset)) { if (vbar_access(vdev, offset)) {
@ -399,7 +399,7 @@ static int32_t vpci_write_pt_dev_cfg(struct pci_vdev *vdev, uint32_t offset,
return 0; return 0;
} }
static int32_t vpci_read_pt_dev_cfg(const struct pci_vdev *vdev, uint32_t offset, static int32_t read_pt_dev_cfg(const struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t *val) uint32_t bytes, uint32_t *val)
{ {
if (vbar_access(vdev, offset)) { if (vbar_access(vdev, offset)) {
@ -431,14 +431,14 @@ static int32_t vpci_read_pt_dev_cfg(const struct pci_vdev *vdev, uint32_t offset
static const struct pci_vdev_ops pci_pt_dev_ops = { static const struct pci_vdev_ops pci_pt_dev_ops = {
.init_vdev = vpci_init_pt_dev, .init_vdev = vpci_init_pt_dev,
.deinit_vdev = vpci_deinit_pt_dev, .deinit_vdev = vpci_deinit_pt_dev,
.write_vdev_cfg = vpci_write_pt_dev_cfg, .write_vdev_cfg = write_pt_dev_cfg,
.read_vdev_cfg = vpci_read_pt_dev_cfg, .read_vdev_cfg = read_pt_dev_cfg,
}; };
/** /**
* @pre vpci != NULL * @pre vpci != NULL
*/ */
static int32_t read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, static int32_t vpci_read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf,
uint32_t offset, uint32_t bytes, uint32_t *val) uint32_t offset, uint32_t bytes, uint32_t *val)
{ {
int32_t ret = 0; int32_t ret = 0;
@ -460,7 +460,7 @@ static int32_t read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf,
/** /**
* @pre vpci != NULL * @pre vpci != NULL
*/ */
static int32_t write_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, static int32_t vpci_write_cfg(struct acrn_vpci *vpci, union pci_bdf bdf,
uint32_t offset, uint32_t bytes, uint32_t val) uint32_t offset, uint32_t bytes, uint32_t val)
{ {
int32_t ret = 0; int32_t ret = 0;

8
hypervisor/dm/vpci/vpci_bridge.c
View File

@ -93,7 +93,7 @@ static void deinit_vpci_bridge(__unused struct pci_vdev *vdev)
{ {
} }
static int32_t vpci_bridge_read_cfg(const struct pci_vdev *vdev, uint32_t offset, static int32_t read_vpci_bridge_cfg(const struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t *val) uint32_t bytes, uint32_t *val)
{ {
if ((offset + bytes) <= 0x100U) { if ((offset + bytes) <= 0x100U) {
@ -106,7 +106,7 @@ static int32_t vpci_bridge_read_cfg(const struct pci_vdev *vdev, uint32_t offset
return 0; return 0;
} }
static int32_t vpci_bridge_write_cfg(__unused struct pci_vdev *vdev, __unused uint32_t offset, static int32_t write_vpci_bridge_cfg(__unused struct pci_vdev *vdev, __unused uint32_t offset,
__unused uint32_t bytes, __unused uint32_t val) __unused uint32_t bytes, __unused uint32_t val)
{ {
return 0; return 0;
@ -115,6 +115,6 @@ static int32_t vpci_bridge_write_cfg(__unused struct pci_vdev *vdev, __unused ui
const struct pci_vdev_ops vpci_bridge_ops = { const struct pci_vdev_ops vpci_bridge_ops = {
.init_vdev = init_vpci_bridge, .init_vdev = init_vpci_bridge,
.deinit_vdev = deinit_vpci_bridge, .deinit_vdev = deinit_vpci_bridge,
.write_vdev_cfg = vpci_bridge_write_cfg, .write_vdev_cfg = write_vpci_bridge_cfg,
.read_vdev_cfg = vpci_bridge_read_cfg, .read_vdev_cfg = read_vpci_bridge_cfg,
}; };