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hv: use int32_t replace int

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Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Li, Fei1
2018-12-08 00:30:49 +08:00
committed by wenlingz
parent e8f3a2d42c
commit e3fc6c3c79
91 changed files with 472 additions and 471 deletions
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4
hypervisor/dm/vioapic.c
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@@ -536,13 +536,13 @@ vioapic_pincount(const struct acrn_vm *vm)
return ret;
}
int vioapic_mmio_access_handler(struct io_request *io_req, void *handler_private_data)
int32_t vioapic_mmio_access_handler(struct io_request *io_req, void *handler_private_data)
{
struct acrn_vm *vm = (struct acrn_vm *)handler_private_data;
struct acrn_vioapic *vioapic;
struct mmio_request *mmio = &io_req->reqs.mmio;
uint64_t gpa = mmio->address;
int ret = 0;
int32_t ret = 0;
vioapic = vm_ioapic(vm);

8
hypervisor/dm/vpci/hostbridge.c
View File

@@ -37,7 +37,7 @@
#include <hypervisor.h>
#include "pci_priv.h"
static int vdev_hostbridge_init(struct pci_vdev *vdev)
static int32_t vdev_hostbridge_init(struct pci_vdev *vdev)
{
/* PCI config space */
pci_vdev_write_cfg_u16(vdev, PCIR_VENDOR, (uint16_t)0x8086U);
@@ -84,12 +84,12 @@ static int vdev_hostbridge_init(struct pci_vdev *vdev)
return 0;
}
static int vdev_hostbridge_deinit(__unused struct pci_vdev *vdev)
static int32_t vdev_hostbridge_deinit(__unused struct pci_vdev *vdev)
{
return 0;
}
static int vdev_hostbridge_cfgread(struct pci_vdev *vdev, uint32_t offset,
static int32_t vdev_hostbridge_cfgread(struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t *val)
{
/* Assumption: access needed to be aligned on 1/2/4 bytes */
@@ -103,7 +103,7 @@ static int vdev_hostbridge_cfgread(struct pci_vdev *vdev, uint32_t offset,
return 0;
}
static int vdev_hostbridge_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
static int32_t vdev_hostbridge_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t val)
{
/* Assumption: access needed to be aligned on 1/2/4 bytes */

22
hypervisor/dm/vpci/msix.c
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@@ -48,12 +48,12 @@ static inline bool msixtable_access(struct pci_vdev *vdev, uint32_t offset)
return in_range(offset, vdev->msix.table_offset, vdev->msix.table_count * MSIX_TABLE_ENTRY_SIZE);
}
static int vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
static int32_t vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
{
struct msix_table_entry *pentry;
struct ptirq_msi_info info;
uint64_t hva;
int ret;
int32_t ret;
info.is_msix = 1;
info.vmsi_addr = vdev->msix.tables[index].addr;
@@ -94,10 +94,10 @@ static inline void enable_disable_msix(struct pci_vdev *vdev, bool enable)
}
/* Do MSI-X remap for all MSI-X table entries in the target device */
static int vmsix_remap(struct pci_vdev *vdev, bool enable)
static int32_t vmsix_remap(struct pci_vdev *vdev, bool enable)
{
uint32_t index;
int ret;
int32_t ret;
/* disable MSI-X during configuration */
enable_disable_msix(vdev, false);
@@ -119,10 +119,10 @@ static int vmsix_remap(struct pci_vdev *vdev, bool enable)
}
/* Do MSI-X remap for one MSI-X table entry only */
static int vmsix_remap_one_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
static int32_t vmsix_remap_one_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
{
uint32_t msgctrl;
int ret;
int32_t ret;
/* disable MSI-X during configuration */
enable_disable_msix(vdev, false);
@@ -144,7 +144,7 @@ static int vmsix_remap_one_entry(struct pci_vdev *vdev, uint32_t index, bool ena
return ret;
}
static int vmsix_cfgread(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val)
static int32_t vmsix_cfgread(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val)
{
int32_t ret;
/* For PIO access, we emulate Capability Structures only */
@@ -159,7 +159,7 @@ static int vmsix_cfgread(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes,
return ret;
}
static int vmsix_cfgwrite(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val)
static int32_t vmsix_cfgwrite(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val)
{
uint32_t msgctrl;
int32_t ret;
@@ -257,7 +257,7 @@ static void vmsix_table_rw(struct pci_vdev *vdev, struct mmio_request *mmio, uin
}
}
static int vmsix_table_mmio_access_handler(struct io_request *io_req, void *handler_private_data)
static int32_t vmsix_table_mmio_access_handler(struct io_request *io_req, void *handler_private_data)
{
struct mmio_request *mmio = &io_req->reqs.mmio;
struct pci_vdev *vdev;
@@ -344,7 +344,7 @@ static void decode_msix_table_bar(struct pci_vdev *vdev)
}
}
static int vmsix_init(struct pci_vdev *vdev)
static int32_t vmsix_init(struct pci_vdev *vdev)
{
uint32_t msgctrl;
uint32_t table_info, i;
@@ -407,7 +407,7 @@ static int vmsix_init(struct pci_vdev *vdev)
return ret;
}
static int vmsix_deinit(struct pci_vdev *vdev)
static int32_t vmsix_deinit(struct pci_vdev *vdev)
{
vdev->msix.intercepted_size = 0U;

8
hypervisor/dm/vpci/partition_mode.c
View File

@@ -36,7 +36,7 @@ static struct pci_vdev *partition_mode_find_vdev(struct vpci *vpci, union pci_bd
{
struct vpci_vdev_array *vdev_array;
struct pci_vdev *vdev;
int i;
int32_t i;
vdev_array = vpci->vm->vm_desc->vpci_vdev_array;
for (i = 0; i < vdev_array->num_pci_vdev; i++) {
@@ -49,12 +49,12 @@ static struct pci_vdev *partition_mode_find_vdev(struct vpci *vpci, union pci_bd
return NULL;
}
static int partition_mode_vpci_init(struct acrn_vm *vm)
static int32_t partition_mode_vpci_init(struct acrn_vm *vm)
{
struct vpci_vdev_array *vdev_array;
struct vpci *vpci = &vm->vpci;
struct pci_vdev *vdev;
int i;
int32_t i;
vdev_array = vm->vm_desc->vpci_vdev_array;
@@ -77,7 +77,7 @@ static void partition_mode_vpci_deinit(struct acrn_vm *vm)
{
struct vpci_vdev_array *vdev_array;
struct pci_vdev *vdev;
int i;
int32_t i;
vdev_array = vm->vm_desc->vpci_vdev_array;

14
hypervisor/dm/vpci/pci_pt.c
View File

@@ -37,7 +37,7 @@ static inline uint32_t pci_bar_base(uint32_t bar)
return bar & PCIM_BAR_MEM_BASE;
}
static int vdev_pt_init_validate(struct pci_vdev *vdev)
static int32_t vdev_pt_init_validate(struct pci_vdev *vdev)
{
uint32_t idx;
@@ -53,9 +53,9 @@ static int vdev_pt_init_validate(struct pci_vdev *vdev)
return 0;
}
static int vdev_pt_init(struct pci_vdev *vdev)
static int32_t vdev_pt_init(struct pci_vdev *vdev)
{
int ret;
int32_t ret;
struct acrn_vm *vm = vdev->vpci->vm;
uint16_t pci_command;
@@ -86,9 +86,9 @@ static int vdev_pt_init(struct pci_vdev *vdev)
return ret;
}
static int vdev_pt_deinit(struct pci_vdev *vdev)
static int32_t vdev_pt_deinit(struct pci_vdev *vdev)
{
int ret;
int32_t ret;
struct acrn_vm *vm = vdev->vpci->vm;
ret = unassign_iommu_device(vm->iommu, (uint8_t)vdev->pdev.bdf.bits.b,
@@ -97,7 +97,7 @@ static int vdev_pt_deinit(struct pci_vdev *vdev)
return ret;
}
static int vdev_pt_cfgread(struct pci_vdev *vdev, uint32_t offset,
static int32_t vdev_pt_cfgread(struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t *val)
{
/* Assumption: access needed to be aligned on 1/2/4 bytes */
@@ -176,7 +176,7 @@ static void vdev_pt_cfgwrite_bar(struct pci_vdev *vdev, uint32_t offset,
pci_vdev_write_cfg_u32(vdev, offset, new_bar);
}
static int vdev_pt_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
static int32_t vdev_pt_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t val)
{
/* Assumption: access needed to be aligned on 1/2/4 bytes */

16
hypervisor/dm/vpic.c
View File

@@ -241,7 +241,7 @@ static int32_t vpic_icw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i
return ret;
}
static int vpic_icw2(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
static int32_t vpic_icw2(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{
dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw2 0x%x\n",
vpic->vm, val);
@@ -253,7 +253,7 @@ static int vpic_icw2(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259
return 0;
}
static int vpic_icw3(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
static int32_t vpic_icw3(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{
dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw3 0x%x\n",
vpic->vm, val);
@@ -297,7 +297,7 @@ static int32_t vpic_icw4(const struct acrn_vpic *vpic, struct i8259_reg_state *i
return ret;
}
static int vpic_ocw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
static int32_t vpic_ocw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{
uint8_t pin, i, bit;
uint8_t old = i8259->mask;
@@ -337,7 +337,7 @@ static int vpic_ocw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259
return 0;
}
static int vpic_ocw2(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
static int32_t vpic_ocw2(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{
dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 ocw2 0x%x\n",
vpic->vm, val);
@@ -379,7 +379,7 @@ static int vpic_ocw2(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint
return 0;
}
static int vpic_ocw3(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
static int32_t vpic_ocw3(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{
dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 ocw3 0x%x\n",
vpic->vm, val);
@@ -616,7 +616,7 @@ void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector)
spinlock_release(&(vpic->lock));
}
static int vpic_read(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
static int32_t vpic_read(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
uint16_t port, uint32_t *eax)
{
uint8_t pin;
@@ -652,10 +652,10 @@ static int vpic_read(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
return 0;
}
static int vpic_write(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
static int32_t vpic_write(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
uint16_t port, uint32_t *eax)
{
int error;
int32_t error;
uint8_t val;
error = 0;

2
hypervisor/dm/vrtc.c
View File

@@ -28,7 +28,7 @@ static bool cmos_update_in_progress(void)
static uint8_t cmos_get_reg_val(uint8_t addr)
{
uint8_t reg;
int tries = 2000U;
int32_t tries = 2000U;
spinlock_obtain(&cmos_lock);