mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-09-12 20:39:59 +00:00
hv: use int32_t replace int
Since it's typedef in "include/lib/types.h" Tracked-On: #861 Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
@@ -37,7 +37,7 @@
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#include <hypervisor.h>
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#include "pci_priv.h"
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static int vdev_hostbridge_init(struct pci_vdev *vdev)
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static int32_t vdev_hostbridge_init(struct pci_vdev *vdev)
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{
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/* PCI config space */
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pci_vdev_write_cfg_u16(vdev, PCIR_VENDOR, (uint16_t)0x8086U);
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@@ -84,12 +84,12 @@ static int vdev_hostbridge_init(struct pci_vdev *vdev)
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return 0;
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}
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static int vdev_hostbridge_deinit(__unused struct pci_vdev *vdev)
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static int32_t vdev_hostbridge_deinit(__unused struct pci_vdev *vdev)
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{
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return 0;
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}
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static int vdev_hostbridge_cfgread(struct pci_vdev *vdev, uint32_t offset,
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static int32_t vdev_hostbridge_cfgread(struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t *val)
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{
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/* Assumption: access needed to be aligned on 1/2/4 bytes */
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@@ -103,7 +103,7 @@ static int vdev_hostbridge_cfgread(struct pci_vdev *vdev, uint32_t offset,
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return 0;
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}
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static int vdev_hostbridge_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
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static int32_t vdev_hostbridge_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t val)
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{
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/* Assumption: access needed to be aligned on 1/2/4 bytes */
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@@ -48,12 +48,12 @@ static inline bool msixtable_access(struct pci_vdev *vdev, uint32_t offset)
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return in_range(offset, vdev->msix.table_offset, vdev->msix.table_count * MSIX_TABLE_ENTRY_SIZE);
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}
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static int vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
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static int32_t vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
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{
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struct msix_table_entry *pentry;
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struct ptirq_msi_info info;
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uint64_t hva;
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int ret;
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int32_t ret;
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info.is_msix = 1;
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info.vmsi_addr = vdev->msix.tables[index].addr;
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@@ -94,10 +94,10 @@ static inline void enable_disable_msix(struct pci_vdev *vdev, bool enable)
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}
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/* Do MSI-X remap for all MSI-X table entries in the target device */
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static int vmsix_remap(struct pci_vdev *vdev, bool enable)
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static int32_t vmsix_remap(struct pci_vdev *vdev, bool enable)
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{
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uint32_t index;
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int ret;
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int32_t ret;
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/* disable MSI-X during configuration */
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enable_disable_msix(vdev, false);
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@@ -119,10 +119,10 @@ static int vmsix_remap(struct pci_vdev *vdev, bool enable)
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}
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/* Do MSI-X remap for one MSI-X table entry only */
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static int vmsix_remap_one_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
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static int32_t vmsix_remap_one_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
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{
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uint32_t msgctrl;
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int ret;
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int32_t ret;
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/* disable MSI-X during configuration */
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enable_disable_msix(vdev, false);
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@@ -144,7 +144,7 @@ static int vmsix_remap_one_entry(struct pci_vdev *vdev, uint32_t index, bool ena
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return ret;
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}
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static int vmsix_cfgread(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val)
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static int32_t vmsix_cfgread(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val)
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{
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int32_t ret;
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/* For PIO access, we emulate Capability Structures only */
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@@ -159,7 +159,7 @@ static int vmsix_cfgread(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes,
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return ret;
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}
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static int vmsix_cfgwrite(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val)
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static int32_t vmsix_cfgwrite(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val)
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{
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uint32_t msgctrl;
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int32_t ret;
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@@ -257,7 +257,7 @@ static void vmsix_table_rw(struct pci_vdev *vdev, struct mmio_request *mmio, uin
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}
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}
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static int vmsix_table_mmio_access_handler(struct io_request *io_req, void *handler_private_data)
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static int32_t vmsix_table_mmio_access_handler(struct io_request *io_req, void *handler_private_data)
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{
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struct mmio_request *mmio = &io_req->reqs.mmio;
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struct pci_vdev *vdev;
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@@ -344,7 +344,7 @@ static void decode_msix_table_bar(struct pci_vdev *vdev)
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}
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}
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static int vmsix_init(struct pci_vdev *vdev)
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static int32_t vmsix_init(struct pci_vdev *vdev)
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{
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uint32_t msgctrl;
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uint32_t table_info, i;
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@@ -407,7 +407,7 @@ static int vmsix_init(struct pci_vdev *vdev)
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return ret;
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}
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static int vmsix_deinit(struct pci_vdev *vdev)
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static int32_t vmsix_deinit(struct pci_vdev *vdev)
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{
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vdev->msix.intercepted_size = 0U;
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@@ -36,7 +36,7 @@ static struct pci_vdev *partition_mode_find_vdev(struct vpci *vpci, union pci_bd
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{
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struct vpci_vdev_array *vdev_array;
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struct pci_vdev *vdev;
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int i;
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int32_t i;
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vdev_array = vpci->vm->vm_desc->vpci_vdev_array;
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for (i = 0; i < vdev_array->num_pci_vdev; i++) {
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@@ -49,12 +49,12 @@ static struct pci_vdev *partition_mode_find_vdev(struct vpci *vpci, union pci_bd
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return NULL;
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}
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static int partition_mode_vpci_init(struct acrn_vm *vm)
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static int32_t partition_mode_vpci_init(struct acrn_vm *vm)
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{
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struct vpci_vdev_array *vdev_array;
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struct vpci *vpci = &vm->vpci;
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struct pci_vdev *vdev;
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int i;
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int32_t i;
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vdev_array = vm->vm_desc->vpci_vdev_array;
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@@ -77,7 +77,7 @@ static void partition_mode_vpci_deinit(struct acrn_vm *vm)
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{
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struct vpci_vdev_array *vdev_array;
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struct pci_vdev *vdev;
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int i;
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int32_t i;
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vdev_array = vm->vm_desc->vpci_vdev_array;
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@@ -37,7 +37,7 @@ static inline uint32_t pci_bar_base(uint32_t bar)
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return bar & PCIM_BAR_MEM_BASE;
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}
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static int vdev_pt_init_validate(struct pci_vdev *vdev)
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static int32_t vdev_pt_init_validate(struct pci_vdev *vdev)
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{
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uint32_t idx;
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@@ -53,9 +53,9 @@ static int vdev_pt_init_validate(struct pci_vdev *vdev)
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return 0;
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}
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static int vdev_pt_init(struct pci_vdev *vdev)
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static int32_t vdev_pt_init(struct pci_vdev *vdev)
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{
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int ret;
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int32_t ret;
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struct acrn_vm *vm = vdev->vpci->vm;
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uint16_t pci_command;
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@@ -86,9 +86,9 @@ static int vdev_pt_init(struct pci_vdev *vdev)
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return ret;
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}
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static int vdev_pt_deinit(struct pci_vdev *vdev)
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static int32_t vdev_pt_deinit(struct pci_vdev *vdev)
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{
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int ret;
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int32_t ret;
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struct acrn_vm *vm = vdev->vpci->vm;
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ret = unassign_iommu_device(vm->iommu, (uint8_t)vdev->pdev.bdf.bits.b,
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@@ -97,7 +97,7 @@ static int vdev_pt_deinit(struct pci_vdev *vdev)
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return ret;
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}
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static int vdev_pt_cfgread(struct pci_vdev *vdev, uint32_t offset,
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static int32_t vdev_pt_cfgread(struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t *val)
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{
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/* Assumption: access needed to be aligned on 1/2/4 bytes */
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@@ -176,7 +176,7 @@ static void vdev_pt_cfgwrite_bar(struct pci_vdev *vdev, uint32_t offset,
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pci_vdev_write_cfg_u32(vdev, offset, new_bar);
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}
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static int vdev_pt_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
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static int32_t vdev_pt_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t val)
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{
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/* Assumption: access needed to be aligned on 1/2/4 bytes */
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