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DM: Add simulated RPMB support

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Create file as simulated RPMB storage for pre-production usage.
Add RPMB APIs to emulate behavior of physical RPMB controllor.

Signed-off-by: Huang Yang <yang.huang@intel.com>
Signed-off-by: Du Min <minx.du@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
This commit is contained in:
Huang, Yang
2018-05-22 17:42:57 -04:00
committed by lijinxia
parent 76d2441378
commit e6d57f439f
4 changed files with 754 additions and 0 deletions
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50
devicemodel/include/rpmb.h
View File

@@ -32,6 +32,46 @@
#include <linux/types.h>
#define RPMB_PHY_MODE 0
#define RPMB_SIM_MODE 1
#define RPMB_BLOCK_SIZE 256
#define RPMB_FRAME_SIZE 512
#define RPMB_PHY_PATH_NAME "/dev/rpmb0"
#define RPMB_SIM_PATH_NAME "/data/rpmbfile"
#define SEQ_CMD_MAX 3 /*support up to 3 cmds*/
#define RPMB_F_WRITE (1UL << 0)
#define RPMB_F_REL_WRITE (1UL << 1)
enum rpmb_request {
RPMB_REQ_PROGRAM_KEY = 0x0001,
RPMB_REQ_GET_COUNTER = 0x0002,
RPMB_REQ_DATA_WRITE = 0x0003,
RPMB_REQ_DATA_READ = 0x0004,
RPMB_REQ_RESULT_READ = 0x0005,
};
enum rpmb_response {
RPMB_RESP_PROGRAM_KEY = 0x0100,
RPMB_RESP_GET_COUNTER = 0x0200,
RPMB_RESP_DATA_WRITE = 0x0300,
RPMB_RESP_DATA_READ = 0x0400,
};
enum rpmb_result {
RPMB_RES_OK = 0x0000,
RPMB_RES_GENERAL_FAILURE = 0x0001,
RPMB_RES_AUTH_FAILURE = 0x0002,
RPMB_RES_COUNT_FAILURE = 0x0003,
RPMB_RES_ADDR_FAILURE = 0x0004,
RPMB_RES_WRITE_FAILURE = 0x0005,
RPMB_RES_READ_FAILURE = 0x0006,
RPMB_RES_NO_AUTH_KEY = 0x0007,
RPMB_RES_WRITE_COUNTER_EXPIRED = 0x0080,
};
/**
* struct rpmb_cmd: rpmb access command
*
@@ -139,7 +179,17 @@ struct rpmb_ioc_seq_cmd {
struct rpmb_ioc_cmd cmds[0];
};
struct rpmb_ioc_seq_data {
struct rpmb_ioc_seq_cmd h;
struct rpmb_ioc_cmd cmd[SEQ_CMD_MAX + 1];
};
int
rpmb_get_counter(__u8 mode, __u8 *key, __u32 *counter, __u16 *result);
#define RPMB_IOC_REQ_CMD _IOWR(0xB5, 80, struct rpmb_ioc_req_cmd)
#define RPMB_IOC_SEQ_CMD _IOWR(0xB5, 81, struct rpmb_ioc_seq_cmd)
__u16 rpmb_get_blocks(void);
#endif /* __RPMB_H__ */

51
devicemodel/include/rpmb_sim.h Normal file
View File

@@ -0,0 +1,51 @@
/*
* Copyright (c) 2018 Intel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer in
* this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef __RPMB_SIM_H__
#define __RPMB_SIM_H__
inline uint32_t swap32(uint32_t val)
{
return ((val & (uint32_t)0x000000ffUL) << 24)
| ((val & (uint32_t)0x0000ff00UL) << 8)
| ((val & (uint32_t)0x00ff0000UL) >> 8)
| ((val & (uint32_t)0xff000000UL) >> 24);
}
inline uint16_t swap16(uint16_t val)
{
return ((val & (uint16_t)0x00ffU) << 8)
| ((val & (uint16_t)0xff00U) >> 8);
}
int rpmb_mac(const uint8_t *key, const struct rpmb_frame *frames,
size_t frame_cnt, uint8_t *mac);
int is_use_sim_rpmb(void);
int rpmb_sim_key_init(uint8_t *key);
int rpmb_sim_send(const void *r);
#endif /* __RPMB_SIM_H__ */