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hv: use asm_pause() to replace inline ASM to satisfy MISRAC

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pause_cpu() --> asm_pause()
hlt_cpu() --> asm_hlt()
inline ASM pause --> asm_pause()

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shuo A Liu
2018-12-26 14:05:05 +08:00
committed by wenlingz
parent 329ea42d73
commit e8ac97671f
6 changed files with 9 additions and 8 deletions
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4
hypervisor/include/arch/x86/cpu.h
View File

@@ -306,12 +306,12 @@ static inline void cpu_msr_write(uint32_t reg, uint64_t msr_val)
asm volatile (" wrmsr " : : "c" (reg), "a" ((uint32_t)msr_val), "d" ((uint32_t)(msr_val >> 32U)));
}
static inline void pause_cpu(void)
static inline void asm_pause(void)
{
asm volatile ("pause" ::: "memory");
}
static inline void hlt_cpu(void)
static inline void asm_hlt(void)
{
asm volatile ("hlt");
}

3
hypervisor/include/debug/logmsg.h
View File

@@ -6,6 +6,7 @@
#ifndef LOGMSG_H
#define LOGMSG_H
#include <cpu.h>
/* Logging severity levels */
#define LOG_FATAL 1U
@@ -116,6 +117,6 @@ void vprintf(const char *fmt, va_list args);
#define panic(...) \
do { pr_fatal("PANIC: %s line: %d\n", __func__, __LINE__); \
pr_fatal(__VA_ARGS__); \
while (1) { asm volatile ("pause" ::: "memory"); }; } while (0)
while (1) { asm_pause(); }; } while (0)
#endif /* LOGMSG_H */