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hv: use asm_pause() to replace inline ASM to satisfy MISRAC

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pause_cpu() --> asm_pause()
hlt_cpu() --> asm_hlt()
inline ASM pause --> asm_pause()

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shuo A Liu 2018-12-26 14:05:05 +08:00 committed by wenlingz
parent 329ea42d73
commit e8ac97671f
6 changed files with 9 additions and 8 deletions
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4
hypervisor/arch/x86/cpu.c
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@ -301,7 +301,7 @@ void stop_cpus(void)
void cpu_do_idle(void) void cpu_do_idle(void)
{ {
__asm __volatile("pause" ::: "memory"); asm_pause();
} }
/** /**
@ -325,7 +325,7 @@ void cpu_dead(void)
/* Halt the CPU */ /* Halt the CPU */
do { do {
hlt_cpu(); asm_hlt();
} while (halt != 0); } while (halt != 0);
} else { } else {
pr_err("pcpu%hu already dead", pcpu_id); pr_err("pcpu%hu already dead", pcpu_id);

2
hypervisor/arch/x86/guest/vcpu.c
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@ -578,7 +578,7 @@ void pause_vcpu(struct acrn_vcpu *vcpu, enum vcpu_state new_state)
if (vcpu->pcpu_id != pcpu_id) { if (vcpu->pcpu_id != pcpu_id) {
while (atomic_load32(&vcpu->running) == 1U) while (atomic_load32(&vcpu->running) == 1U)
__asm__ __volatile("pause" ::: "memory"); asm_pause();
} }
} else { } else {
remove_from_cpu_runqueue(&vcpu->sched_obj, vcpu->pcpu_id); remove_from_cpu_runqueue(&vcpu->sched_obj, vcpu->pcpu_id);

2
hypervisor/arch/x86/vtd.c
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@ -256,7 +256,7 @@ static inline void dmar_wait_completion(const struct dmar_drhd_rt *dmar_unit, ui
} }
ASSERT(((rdtsc() - start) < CYCLES_PER_MS), ASSERT(((rdtsc() - start) < CYCLES_PER_MS),
"DMAR OP Timeout!"); "DMAR OP Timeout!");
pause_cpu(); asm_pause();
} }
} }

2
hypervisor/debug/dump.c
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@ -247,7 +247,7 @@ void asm_assert(int32_t line, const char *file, const char *txt)
show_host_call_trace(rsp, rbp, pcpu_id); show_host_call_trace(rsp, rbp, pcpu_id);
dump_guest_context(pcpu_id); dump_guest_context(pcpu_id);
do { do {
pause_cpu(); asm_pause();
} while (1); } while (1);
} }

4
hypervisor/include/arch/x86/cpu.h
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@ -306,12 +306,12 @@ static inline void cpu_msr_write(uint32_t reg, uint64_t msr_val)
asm volatile (" wrmsr " : : "c" (reg), "a" ((uint32_t)msr_val), "d" ((uint32_t)(msr_val >> 32U))); asm volatile (" wrmsr " : : "c" (reg), "a" ((uint32_t)msr_val), "d" ((uint32_t)(msr_val >> 32U)));
} }
static inline void pause_cpu(void) static inline void asm_pause(void)
{ {
asm volatile ("pause" ::: "memory"); asm volatile ("pause" ::: "memory");
} }
static inline void hlt_cpu(void) static inline void asm_hlt(void)
{ {
asm volatile ("hlt"); asm volatile ("hlt");
} }

3
hypervisor/include/debug/logmsg.h
View File

@ -6,6 +6,7 @@
#ifndef LOGMSG_H #ifndef LOGMSG_H
#define LOGMSG_H #define LOGMSG_H
#include <cpu.h>
/* Logging severity levels */ /* Logging severity levels */
#define LOG_FATAL 1U #define LOG_FATAL 1U
@ -116,6 +117,6 @@ void vprintf(const char *fmt, va_list args);
#define panic(...) \ #define panic(...) \
do { pr_fatal("PANIC: %s line: %d\n", __func__, __LINE__); \ do { pr_fatal("PANIC: %s line: %d\n", __func__, __LINE__); \
pr_fatal(__VA_ARGS__); \ pr_fatal(__VA_ARGS__); \
while (1) { asm volatile ("pause" ::: "memory"); }; } while (0) while (1) { asm_pause(); }; } while (0)
#endif /* LOGMSG_H */ #endif /* LOGMSG_H */