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doc: fix utf-8 punctuation, branding, spelling
Fix some stray UTF-8 punctuation and symbol characters, unnecessary trademark symbols, and some misspellings missed during regular reviews. Tracked-On: #2712 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
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@@ -10,7 +10,7 @@ Purpose of this Document
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========================
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This high-level design (HLD) document describes the usage requirements
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and high level design for Intel® Graphics Virtualization Technology for
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and high level design for Intel |reg| Graphics Virtualization Technology for
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shared virtual :term:`GPU` technology (:term:`GVT-g`) on Apollo Lake-I
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SoCs.
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@@ -26,10 +26,10 @@ Audience
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========
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This document is for developers, validation teams, architects and
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maintainers of Intel® GVT-g for the Apollo Lake SoCs.
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maintainers of Intel |reg| GVT-g for the Apollo Lake SoCs.
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The reader should have some familiarity with the basic concepts of
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system virtualization and Intel® processor graphics.
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system virtualization and Intel processor graphics.
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Reference Documents
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===================
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@@ -45,19 +45,19 @@ The following documents were used as references for this specification:
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Background
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**********
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Intel® GVT-g is an enabling technology in emerging graphics
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Intel GVT-g is an enabling technology in emerging graphics
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virtualization scenarios. It adopts a full GPU virtualization approach
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based on mediated pass-through technology, to achieve good performance,
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scalability and secure isolation among Virtual Machines (VMs). A virtual
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GPU (vGPU), with full GPU features, is presented to each VM so that a
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native graphics driver can run directly inside a VM.
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Intel® GVT-g technology for Apollo Lake (APL) has been implemented in
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Intel GVT-g technology for Apollo Lake (APL) has been implemented in
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open source hypervisors or Virtual Machine Monitors (VMMs):
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- Intel® GVT-g for ACRN, also known as, "AcrnGT"
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- Intel® GVT-g for KVM, also known as, "KVMGT"
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- Intel® GVT-g for Xen, also known as, "XenGT"
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- Intel GVT-g for ACRN, also known as, "AcrnGT"
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- Intel GVT-g for KVM, also known as, "KVMGT"
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- Intel GVT-g for Xen, also known as, "XenGT"
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The core vGPU device model is released under BSD/MIT dual license, so it
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can be reused in other proprietary hypervisors.
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@@ -119,7 +119,7 @@ virtualization technology. It has been used in commercial virtualization
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productions, for example, VMware*, PCoIP*, and Microsoft* RemoteFx*.
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It is a natural path when researchers study a new type of
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I/O virtualization usage, for example, when GPGPU computing in VM was
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initially proposed. Intel® GVT-s is based on this approach.
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initially proposed. Intel GVT-s is based on this approach.
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The architecture of API forwarding is shown in :numref:`api-forwarding`:
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@@ -170,7 +170,7 @@ capability among VMs. Only one VM at a time can use the hardware
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acceleration capability of the GPU, which is a major limitation of this
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technique. However, it is still a good approach to enable graphics
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virtualization usages on Intel server platforms, as an intermediate
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solution. Intel® GVT-d uses this mechanism.
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solution. Intel GVT-d uses this mechanism.
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.. figure:: images/APL_GVT-g-pass-through.png
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:width: 400px
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@@ -189,7 +189,7 @@ with each VF directly assignable to a VM.
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Mediated Pass-Through
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*********************
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Intel® GVT-g achieves full GPU virtualization using a "mediated
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Intel GVT-g achieves full GPU virtualization using a "mediated
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pass-through" technique.
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Concept
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@@ -275,7 +275,7 @@ The architecture of ACRN VBS-K is shown in
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:numref:`kernel-virtio-framework` below.
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Generally VBS-K provides acceleration towards performance critical
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devices emulated by VBS-U modules by handling the “data plane” of the
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devices emulated by VBS-U modules by handling the "data plane" of the
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devices directly in the kernel. When VBS-K is enabled for certain
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devices, the kernel-land vring service API helpers, instead of the
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user-land helpers, are used to access the virtqueues shared by the FE
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@@ -154,7 +154,7 @@ char devices and UART DM immediately.
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data comes from a raw channel, the data will be passed forward. Before
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transmitting to the virtual UART interface, all data needs to be
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packed with an address header and link header.
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- For Rx direction, the data comeis from the UOS. The IOC mediator receives link
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- For Rx direction, the data comes from the UOS. The IOC mediator receives link
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data from the virtual UART interface. The data will be unpacked by Core
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thread, and then forwarded to Rx queue, similar to how the Tx direction flow
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is done except that the heartbeat and RTC are only used by the IOC
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@@ -456,7 +456,7 @@ the SoC.
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System control - Heartbeat
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Heartbeate frame definiton is shown here:
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Heartbeat frame definition is shown here:
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.. figure:: images/ioc-image6.png
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:width: 900px
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@@ -113,7 +113,7 @@ follows::
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-s <slot>,xhci,[bus1-port1,bus2-port2],cap=platform
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- *cap*: cap means virtual xHCI capability. This parameter
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indicates virtual xHCI should emulate the named platform’s xHCI
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indicates virtual xHCI should emulate the named platform's xHCI
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capabilities.
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A simple example::
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