doc: fix utf-8 punctuation, branding, spelling

Fix some stray UTF-8 punctuation and symbol characters, unnecessary
trademark symbols, and some misspellings missed during regular reviews.

Tracked-On: #2712

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This commit is contained in:
David B. Kinder
2019-03-08 11:01:04 -08:00
committed by David Kinder
parent 9e78ad52d9
commit e9335fcee6
24 changed files with 94 additions and 97 deletions

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@@ -10,7 +10,7 @@ Purpose of this Document
========================
This high-level design (HLD) document describes the usage requirements
and high level design for Intel® Graphics Virtualization Technology for
and high level design for Intel |reg| Graphics Virtualization Technology for
shared virtual :term:`GPU` technology (:term:`GVT-g`) on Apollo Lake-I
SoCs.
@@ -26,10 +26,10 @@ Audience
========
This document is for developers, validation teams, architects and
maintainers of Intel® GVT-g for the Apollo Lake SoCs.
maintainers of Intel |reg| GVT-g for the Apollo Lake SoCs.
The reader should have some familiarity with the basic concepts of
system virtualization and Intel® processor graphics.
system virtualization and Intel processor graphics.
Reference Documents
===================
@@ -45,19 +45,19 @@ The following documents were used as references for this specification:
Background
**********
Intel® GVT-g is an enabling technology in emerging graphics
Intel GVT-g is an enabling technology in emerging graphics
virtualization scenarios. It adopts a full GPU virtualization approach
based on mediated pass-through technology, to achieve good performance,
scalability and secure isolation among Virtual Machines (VMs). A virtual
GPU (vGPU), with full GPU features, is presented to each VM so that a
native graphics driver can run directly inside a VM.
Intel® GVT-g technology for Apollo Lake (APL) has been implemented in
Intel GVT-g technology for Apollo Lake (APL) has been implemented in
open source hypervisors or Virtual Machine Monitors (VMMs):
- Intel® GVT-g for ACRN, also known as, "AcrnGT"
- Intel® GVT-g for KVM, also known as, "KVMGT"
- Intel® GVT-g for Xen, also known as, "XenGT"
- Intel GVT-g for ACRN, also known as, "AcrnGT"
- Intel GVT-g for KVM, also known as, "KVMGT"
- Intel GVT-g for Xen, also known as, "XenGT"
The core vGPU device model is released under BSD/MIT dual license, so it
can be reused in other proprietary hypervisors.
@@ -119,7 +119,7 @@ virtualization technology. It has been used in commercial virtualization
productions, for example, VMware*, PCoIP*, and Microsoft* RemoteFx*.
It is a natural path when researchers study a new type of
I/O virtualization usage, for example, when GPGPU computing in VM was
initially proposed. Intel® GVT-s is based on this approach.
initially proposed. Intel GVT-s is based on this approach.
The architecture of API forwarding is shown in :numref:`api-forwarding`:
@@ -170,7 +170,7 @@ capability among VMs. Only one VM at a time can use the hardware
acceleration capability of the GPU, which is a major limitation of this
technique. However, it is still a good approach to enable graphics
virtualization usages on Intel server platforms, as an intermediate
solution. Intel® GVT-d uses this mechanism.
solution. Intel GVT-d uses this mechanism.
.. figure:: images/APL_GVT-g-pass-through.png
:width: 400px
@@ -189,7 +189,7 @@ with each VF directly assignable to a VM.
Mediated Pass-Through
*********************
Intel® GVT-g achieves full GPU virtualization using a "mediated
Intel GVT-g achieves full GPU virtualization using a "mediated
pass-through" technique.
Concept

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@@ -275,7 +275,7 @@ The architecture of ACRN VBS-K is shown in
:numref:`kernel-virtio-framework` below.
Generally VBS-K provides acceleration towards performance critical
devices emulated by VBS-U modules by handling the data plane of the
devices emulated by VBS-U modules by handling the "data plane" of the
devices directly in the kernel. When VBS-K is enabled for certain
devices, the kernel-land vring service API helpers, instead of the
user-land helpers, are used to access the virtqueues shared by the FE

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@@ -154,7 +154,7 @@ char devices and UART DM immediately.
data comes from a raw channel, the data will be passed forward. Before
transmitting to the virtual UART interface, all data needs to be
packed with an address header and link header.
- For Rx direction, the data comeis from the UOS. The IOC mediator receives link
- For Rx direction, the data comes from the UOS. The IOC mediator receives link
data from the virtual UART interface. The data will be unpacked by Core
thread, and then forwarded to Rx queue, similar to how the Tx direction flow
is done except that the heartbeat and RTC are only used by the IOC
@@ -456,7 +456,7 @@ the SoC.
System control - Heartbeat
Heartbeate frame definiton is shown here:
Heartbeat frame definition is shown here:
.. figure:: images/ioc-image6.png
:width: 900px

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@@ -113,7 +113,7 @@ follows::
-s <slot>,xhci,[bus1-port1,bus2-port2],cap=platform
- *cap*: cap means virtual xHCI capability. This parameter
indicates virtual xHCI should emulate the named platforms xHCI
indicates virtual xHCI should emulate the named platform's xHCI
capabilities.
A simple example::