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HV: link CONFIG_MAX_IOMMU_NUM and MAX_DRHDS to DRHD_COUNT

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The value of CONFIG_MAX_IOMMU and MAX_DRHDS are identical to DRHD_COUNT
which defined in platform ACPI table, so remove CONFIG_MAX_IOMMU_NUM
from Kconfig and link these three MACROs together.

Tracked-On: #3977

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun
2019-10-29 17:13:58 +08:00
committed by wenlingz
parent bce4b61db7
commit e9a1ace1cc
7 changed files with 14 additions and 72 deletions
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7
hypervisor/arch/x86/Kconfig
View File

@@ -73,13 +73,6 @@ config MAX_PT_IRQ_ENTRIES
range 0 128
default 64
config MAX_IOMMU_NUM
int "Maximum number of IOMMU devices"
range 1 6
default 2
help
The maximum number of physical IOMMUs the hypervisor can support.
config STACK_SIZE
hex "Capacity of one stack, in bytes"
default 0x2000

1
hypervisor/arch/x86/configs/icl-rvp.config
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@@ -3,4 +3,3 @@ CONFIG_BOARD="icl-rvp"
CONFIG_SERIAL_LEGACY=y
CONFIG_SOS_RAM_SIZE=0x600000000
CONFIG_UOS_RAM_SIZE=0x600000000
CONFIG_MAX_IOMMU_NUM=3

2
hypervisor/arch/x86/configs/platform_acpi_info.h
View File

@@ -25,7 +25,7 @@
#define RESET_REGISTER_SPACE_ID 0UL
/* DRHD of DMAR */
#define DRHD_COUNT 0U
#define DRHD_COUNT 8U
#define DRHD0_DEV_CNT 0U
#define DRHD0_SEGMENT 0U

4
hypervisor/arch/x86/vtd.c
View File

@@ -36,6 +36,8 @@
#define ROOT_ENTRY_LOWER_CTP_POS (12U)
#define ROOT_ENTRY_LOWER_CTP_MASK (0xFFFFFFFFFFFFFUL << ROOT_ENTRY_LOWER_CTP_POS)
#define CONFIG_MAX_IOMMU_NUM DRHD_COUNT
/* 4 iommu fault register state */
#define IOMMU_FAULT_REGISTER_STATE_NUM 4U
#define IOMMU_FAULT_REGISTER_SIZE 4U
@@ -188,7 +190,7 @@ bool iommu_snoop_supported(const struct iommu_domain *iommu)
return ret;
}
static struct dmar_drhd_rt dmar_drhd_units[CONFIG_MAX_IOMMU_NUM];
static struct dmar_drhd_rt dmar_drhd_units[MAX_DRHDS];
static bool iommu_page_walk_coherent = true;
static uint32_t qi_status = 0U;
static struct dmar_info *platform_dmar_info = NULL;