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HV:fix "Pointer param should be declared pointer to const"

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Fix violations for function whose parameter can be read-only.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Huihuang Shi
2018-10-23 11:45:29 +08:00
committed by wenlingz
parent d79007ae70
commit ea32c34ae1
39 changed files with 149 additions and 149 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
hypervisor/arch/x86/assign.c
View File

@@ -17,7 +17,7 @@
*/
static inline struct ptdev_remapping_info *
ptdev_lookup_entry_by_sid(uint32_t intr_type,
union source_id *sid,const struct vm *vm)
const union source_id *sid,const struct vm *vm)
{
struct ptdev_remapping_info *entry;
struct list_head *pos;
@@ -38,12 +38,12 @@ ptdev_lookup_entry_by_sid(uint32_t intr_type,
}
static inline bool
is_entry_active(struct ptdev_remapping_info *entry)
is_entry_active(const struct ptdev_remapping_info *entry)
{
return atomic_load32(&entry->active) == ACTIVE_FLAG;
}
static bool ptdev_hv_owned_intx(const struct vm *vm, union source_id *virt_sid)
static bool ptdev_hv_owned_intx(const struct vm *vm, const union source_id *virt_sid)
{
/* vm0 vuart pin is owned by hypervisor under debug version */
if (is_vm0(vm) && (virt_sid->intx_id.pin == COM1_IRQ)) {
@@ -377,9 +377,9 @@ END:
}
static void ptdev_intr_handle_irq(struct vm *vm,
struct ptdev_remapping_info *entry)
const struct ptdev_remapping_info *entry)
{
union source_id *virt_sid = &entry->virt_sid;
const union source_id *virt_sid = &entry->virt_sid;
switch (virt_sid->intx_id.src) {
case PTDEV_VPIN_IOAPIC:
{
@@ -790,7 +790,7 @@ void ptdev_remove_msix_remapping(const struct vm *vm, uint16_t virt_bdf,
#ifdef HV_DEBUG
#define PTDEV_INVALID_PIN 0xffU
static void get_entry_info(struct ptdev_remapping_info *entry, char *type,
static void get_entry_info(const struct ptdev_remapping_info *entry, char *type,
uint32_t *irq, uint32_t *vector, uint64_t *dest, bool *lvl_tm,
uint8_t *pin, uint8_t *vpin, uint32_t *bdf, uint32_t *vbdf)
{

2
hypervisor/arch/x86/guest/guest.c
View File

@@ -72,7 +72,7 @@ enum vm_paging_mode get_vcpu_paging_mode(struct vcpu *vcpu)
/* TODO: Add code to check for Revserved bits, SMAP and PKE when do translation
* during page walk */
static int local_gva2gpa_common(struct vcpu *vcpu, struct page_walk_info *pw_info,
static int local_gva2gpa_common(struct vcpu *vcpu, const struct page_walk_info *pw_info,
uint64_t gva, uint64_t *gpa, uint32_t *err_code)
{
uint32_t i;

30
hypervisor/arch/x86/guest/instr_emul.c
View File

@@ -512,7 +512,7 @@ static int mmio_write(struct vcpu *vcpu, uint64_t wval)
return 0;
}
static void vie_calc_bytereg(struct instr_emul_vie *vie,
static void vie_calc_bytereg(const struct instr_emul_vie *vie,
enum cpu_reg_name *reg, int *lhbr)
{
*lhbr = 0;
@@ -538,7 +538,7 @@ static void vie_calc_bytereg(struct instr_emul_vie *vie,
}
}
static uint8_t vie_read_bytereg(struct vcpu *vcpu, struct instr_emul_vie *vie)
static uint8_t vie_read_bytereg(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int lhbr;
uint64_t val;
@@ -561,7 +561,7 @@ static uint8_t vie_read_bytereg(struct vcpu *vcpu, struct instr_emul_vie *vie)
return reg_val;
}
static void vie_write_bytereg(struct vcpu *vcpu, struct instr_emul_vie *vie,
static void vie_write_bytereg(struct vcpu *vcpu, const struct instr_emul_vie *vie,
uint8_t byte)
{
uint64_t origval, val, mask;
@@ -664,7 +664,7 @@ static uint64_t getcc(uint8_t opsize, uint64_t x, uint64_t y)
}
}
static int emulate_mov(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_mov(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error;
uint8_t size;
@@ -780,7 +780,7 @@ static int emulate_mov(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error;
}
static int emulate_movx(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_movx(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error;
uint8_t size;
@@ -980,7 +980,7 @@ exception_inject:
* For MOVs instruction, we always check RDI during instruction decoding phase.
* And access RSI without any check during instruction emulation phase.
*/
static int emulate_movs(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_movs(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
uint64_t src_gva, gpa, val = 0UL;
uint64_t *dst_hva, *src_hva;
@@ -1067,7 +1067,7 @@ done:
return error;
}
static int emulate_stos(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_stos(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error, repeat;
uint8_t opsize = vie->opsize;
@@ -1121,7 +1121,7 @@ static int emulate_stos(struct vcpu *vcpu, struct instr_emul_vie *vie)
return 0;
}
static int emulate_test(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_test(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error;
uint8_t size;
@@ -1187,7 +1187,7 @@ static int emulate_test(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error;
}
static int emulate_and(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_and(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error;
uint8_t size;
@@ -1275,7 +1275,7 @@ static int emulate_and(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error;
}
static int emulate_or(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_or(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error;
uint8_t size;
@@ -1366,7 +1366,7 @@ static int emulate_or(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error;
}
static int emulate_cmp(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_cmp(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error;
uint8_t size;
@@ -1458,7 +1458,7 @@ static int emulate_cmp(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error;
}
static int emulate_sub(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_sub(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error;
uint8_t size;
@@ -1512,7 +1512,7 @@ static int emulate_sub(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error;
}
static int emulate_group1(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_group1(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
int error;
@@ -1534,7 +1534,7 @@ static int emulate_group1(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error;
}
static int emulate_bittest(struct vcpu *vcpu, struct instr_emul_vie *vie)
static int emulate_bittest(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{
uint64_t val, rflags, bitmask;
int error;
@@ -1664,7 +1664,7 @@ static int vie_init(struct instr_emul_vie *vie, struct vcpu *vcpu)
return 0;
}
static int vie_peek(struct instr_emul_vie *vie, uint8_t *x)
static int vie_peek(const struct instr_emul_vie *vie, uint8_t *x)
{
if (vie->num_processed < vie->num_valid) {

2
hypervisor/arch/x86/guest/pm.c
View File

@@ -187,7 +187,7 @@ static void pm1ab_io_write(__unused struct vm *vm, uint16_t addr, size_t width,
}
static void
register_gas_io_handler(struct vm *vm, struct acpi_generic_address *gas)
register_gas_io_handler(struct vm *vm, const struct acpi_generic_address *gas)
{
uint8_t io_len[5] = {0, 1, 2, 4, 8};
struct vm_io_range gas_io;

2
hypervisor/arch/x86/guest/ucode.c
View File

@@ -27,7 +27,7 @@ uint64_t get_microcode_version(void)
* According to SDM vol 3 Table 9-7. If data_size field of uCode
* header is zero, the ucode length is 2000
*/
static inline size_t get_ucode_data_size(struct ucode_header *uhdr)
static inline size_t get_ucode_data_size(const struct ucode_header *uhdr)
{
return ((uhdr->data_size != 0U) ? uhdr->data_size : 2000U);
}

64
hypervisor/arch/x86/guest/vlapic.c
View File

@@ -88,10 +88,10 @@ static int
apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector);
static int
apicv_pending_intr(struct acrn_vlapic *vlapic);
apicv_pending_intr(const struct acrn_vlapic *vlapic);
static void
apicv_batch_set_tmr(struct acrn_vlapic *vlapic);
apicv_batch_set_tmr(const struct acrn_vlapic *vlapic);
/*
* Post an interrupt to the vcpu running on 'hostcpu'. This will use a
@@ -154,23 +154,23 @@ vm_active_cpus(const struct vm *vm)
}
uint32_t
vlapic_get_id(struct acrn_vlapic *vlapic)
vlapic_get_id(const struct acrn_vlapic *vlapic)
{
uint32_t id = vlapic->apic_page.id.v;
return id;
}
uint8_t
vlapic_get_apicid(struct acrn_vlapic *vlapic)
vlapic_get_apicid(const struct acrn_vlapic *vlapic)
{
uint32_t apicid = (vlapic->apic_page.id.v) >> APIC_ID_SHIFT;
return (uint8_t)apicid;
}
static inline uint32_t
vlapic_build_id(struct acrn_vlapic *vlapic)
vlapic_build_id(const struct acrn_vlapic *vlapic)
{
struct vcpu *vcpu = vlapic->vcpu;
const struct vcpu *vcpu = vlapic->vcpu;
uint8_t vlapic_id;
uint32_t lapic_regs_id;
@@ -236,28 +236,28 @@ vlapic_timer_divisor_shift(uint32_t dcr)
}
static inline bool
vlapic_lvtt_oneshot(struct acrn_vlapic *vlapic)
vlapic_lvtt_oneshot(const struct acrn_vlapic *vlapic)
{
return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM)
== APIC_LVTT_TM_ONE_SHOT);
}
static inline bool
vlapic_lvtt_period(struct acrn_vlapic *vlapic)
vlapic_lvtt_period(const struct acrn_vlapic *vlapic)
{
return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM)
== APIC_LVTT_TM_PERIODIC);
}
static inline bool
vlapic_lvtt_tsc_deadline(struct acrn_vlapic *vlapic)
vlapic_lvtt_tsc_deadline(const struct acrn_vlapic *vlapic)
{
return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM)
== APIC_LVTT_TM_TSCDLT);
}
static inline bool
vlapic_lvtt_masked(struct acrn_vlapic *vlapic)
vlapic_lvtt_masked(const struct acrn_vlapic *vlapic)
{
return ((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_M)
!= 0U;
@@ -343,11 +343,11 @@ static void vlapic_update_lvtt(struct acrn_vlapic *vlapic,
}
}
static uint32_t vlapic_get_ccr(struct acrn_vlapic *vlapic)
static uint32_t vlapic_get_ccr(const struct acrn_vlapic *vlapic)
{
uint64_t now = rdtsc();
uint32_t remain_count = 0U;
struct vlapic_timer *vtimer;
const struct vlapic_timer *vtimer;
vtimer = &vlapic->vtimer;
@@ -400,7 +400,7 @@ static void vlapic_icrtmr_write_handler(struct acrn_vlapic *vlapic)
}
}
static uint64_t vlapic_get_tsc_deadline_msr(struct acrn_vlapic *vlapic)
static uint64_t vlapic_get_tsc_deadline_msr(const struct acrn_vlapic *vlapic)
{
if (!vlapic_lvtt_tsc_deadline(vlapic)) {
return 0;
@@ -621,7 +621,7 @@ vlapic_get_lvtptr(struct acrn_vlapic *vlapic, uint32_t offset)
}
static inline uint32_t
vlapic_get_lvt(struct acrn_vlapic *vlapic, uint32_t offset)
vlapic_get_lvt(const struct acrn_vlapic *vlapic, uint32_t offset)
{
uint32_t idx, val;
@@ -762,10 +762,10 @@ vlapic_fire_lvt(struct acrn_vlapic *vlapic, uint32_t lvt)
}
static void
dump_isrvec_stk(struct acrn_vlapic *vlapic)
dump_isrvec_stk(const struct acrn_vlapic *vlapic)
{
uint32_t i;
struct lapic_reg *isrptr;
const struct lapic_reg *isrptr;
isrptr = &(vlapic->apic_page.isr[0]);
for (i = 0U; i < 8U; i++) {
@@ -1095,9 +1095,9 @@ vlapic_set_tpr(struct acrn_vlapic *vlapic, uint32_t val)
}
static uint32_t
vlapic_get_tpr(struct acrn_vlapic *vlapic)
vlapic_get_tpr(const struct acrn_vlapic *vlapic)
{
struct lapic_regs *lapic = &(vlapic->apic_page);
const struct lapic_regs *lapic = &(vlapic->apic_page);
return lapic->tpr.v;
}
@@ -1119,7 +1119,7 @@ vlapic_set_cr8(struct acrn_vlapic *vlapic, uint64_t val)
}
uint64_t
vlapic_get_cr8(struct acrn_vlapic *vlapic)
vlapic_get_cr8(const struct acrn_vlapic *vlapic)
{
uint32_t tpr;
@@ -1252,11 +1252,11 @@ vlapic_icrlo_write_handler(struct acrn_vlapic *vlapic)
}
int
vlapic_pending_intr(struct acrn_vlapic *vlapic, uint32_t *vecptr)
vlapic_pending_intr(const struct acrn_vlapic *vlapic, uint32_t *vecptr)
{
struct lapic_regs *lapic = &(vlapic->apic_page);
const struct lapic_regs *lapic = &(vlapic->apic_page);
uint32_t i, vector, val, bitpos;
struct lapic_reg *irrptr;
const struct lapic_reg *irrptr;
if (is_apicv_intr_delivery_supported()) {
return apicv_pending_intr(vlapic);
@@ -1647,7 +1647,7 @@ vlapic_init(struct acrn_vlapic *vlapic)
vlapic_reset(vlapic);
}
void vlapic_restore(struct acrn_vlapic *vlapic, struct lapic_regs *regs)
void vlapic_restore(struct acrn_vlapic *vlapic, const struct lapic_regs *regs)
{
struct lapic_regs *lapic;
int i;
@@ -1674,7 +1674,7 @@ void vlapic_restore(struct acrn_vlapic *vlapic, struct lapic_regs *regs)
}
static uint64_t
vlapic_get_apicbase(struct acrn_vlapic *vlapic)
vlapic_get_apicbase(const struct acrn_vlapic *vlapic)
{
return vlapic->msr_apicbase;
@@ -1738,9 +1738,9 @@ vlapic_deliver_intr(struct vm *vm, bool level, uint32_t dest, bool phys,
}
bool
vlapic_enabled(struct acrn_vlapic *vlapic)
vlapic_enabled(const struct acrn_vlapic *vlapic)
{
struct lapic_regs *lapic = &(vlapic->apic_page);
const struct lapic_regs *lapic = &(vlapic->apic_page);
if (((vlapic->msr_apicbase & APICBASE_ENABLED) != 0UL) &&
((lapic->svr.v & APIC_SVR_ENABLE) != 0U)) {
@@ -2055,10 +2055,10 @@ apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector)
}
static int
apicv_pending_intr(struct acrn_vlapic *vlapic)
apicv_pending_intr(const struct acrn_vlapic *vlapic)
{
struct vlapic_pir_desc *pir_desc;
struct lapic_regs *lapic;
const struct vlapic_pir_desc *pir_desc;
const struct lapic_regs *lapic;
uint64_t pending, pirval;
uint32_t i, ppr, vpr;
@@ -2093,11 +2093,11 @@ apicv_pending_intr(struct acrn_vlapic *vlapic)
#define EOI_STEP_LEN (64U)
#define TMR_STEP_LEN (32U)
static void
apicv_batch_set_tmr(struct acrn_vlapic *vlapic)
apicv_batch_set_tmr(const struct acrn_vlapic *vlapic)
{
struct lapic_regs *lapic = &(vlapic->apic_page);
const struct lapic_regs *lapic = &(vlapic->apic_page);
uint64_t val;
struct lapic_reg *ptr;
const struct lapic_reg *ptr;
uint32_t s, e;
ptr = &lapic->tmr[0];

10
hypervisor/arch/x86/io.c
View File

@@ -22,9 +22,9 @@ static void complete_ioreq(struct vhm_request *vhm_req)
* request having transferred to the COMPLETE state.
*/
static void
emulate_pio_post(struct vcpu *vcpu, struct io_request *io_req)
emulate_pio_post(struct vcpu *vcpu, const struct io_request *io_req)
{
struct pio_request *pio_req = &io_req->reqs.pio;
const struct pio_request *pio_req = &io_req->reqs.pio;
uint64_t mask = 0xFFFFFFFFUL >> (32UL - 8UL * pio_req->size);
if (pio_req->direction == REQUEST_READ) {
@@ -68,9 +68,9 @@ void dm_emulate_pio_post(struct vcpu *vcpu)
* either a previous call to emulate_io() returning 0 or the corresponding VHM
* request having transferred to the COMPLETE state.
*/
void emulate_mmio_post(struct vcpu *vcpu, struct io_request *io_req)
void emulate_mmio_post(struct vcpu *vcpu, const struct io_request *io_req)
{
struct mmio_request *mmio_req = &io_req->reqs.mmio;
const struct mmio_request *mmio_req = &io_req->reqs.mmio;
if (mmio_req->direction == REQUEST_READ) {
/* Emulate instruction and update vcpu register set */
@@ -451,7 +451,7 @@ void setup_io_bitmap(struct vm *vm)
}
}
void register_io_emulation_handler(struct vm *vm, struct vm_io_range *range,
void register_io_emulation_handler(struct vm *vm, const struct vm_io_range *range,
io_read_fn_t io_read_fn_ptr,
io_write_fn_t io_write_fn_ptr)
{

8
hypervisor/arch/x86/irq.c
View File

@@ -285,14 +285,14 @@ static void handle_spurious_interrupt(uint32_t vector)
}
}
static inline bool irq_need_mask(struct irq_desc *desc)
static inline bool irq_need_mask(const struct irq_desc *desc)
{
/* level triggered gsi should be masked */
return (((desc->flags & IRQF_LEVEL) != 0U)
&& irq_is_gsi(desc->irq));
}
static inline bool irq_need_unmask(struct irq_desc *desc)
static inline bool irq_need_unmask(const struct irq_desc *desc)
{
/* level triggered gsi for non-ptdev should be unmasked */
return (((desc->flags & IRQF_LEVEL) != 0U)
@@ -300,7 +300,7 @@ static inline bool irq_need_unmask(struct irq_desc *desc)
&& irq_is_gsi(desc->irq));
}
static inline void handle_irq(struct irq_desc *desc)
static inline void handle_irq(const struct irq_desc *desc)
{
irq_action_t action = desc->action;
@@ -321,7 +321,7 @@ static inline void handle_irq(struct irq_desc *desc)
}
/* do_IRQ() */
void dispatch_interrupt(struct intr_excp_ctx *ctx)
void dispatch_interrupt(const struct intr_excp_ctx *ctx)
{
uint32_t vr = ctx->vector;
uint32_t irq = vector_to_irq[vr];

2
hypervisor/arch/x86/lapic.c
View File

@@ -199,7 +199,7 @@ void save_lapic(struct lapic_regs *regs)
(uint32_t) msr_read(MSR_IA32_EXT_APIC_DIV_CONF);
}
static void restore_lapic(struct lapic_regs *regs)
static void restore_lapic(const struct lapic_regs *regs)
{
msr_write(MSR_IA32_EXT_APIC_TPR, (uint64_t) regs->tpr.v);
msr_write(MSR_IA32_EXT_APIC_SIVR, (uint64_t) regs->svr.v);

12
hypervisor/arch/x86/pagetable.c
View File

@@ -92,7 +92,7 @@ static inline int construct_pgentry(enum _page_table_type ptt, uint64_t *pde)
* type: MR_DEL
* delete [vaddr_start, vaddr_end) MT PT mapping
*/
static void modify_or_del_pte(uint64_t *pde,
static void modify_or_del_pte(const uint64_t *pde,
uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot_set, uint64_t prot_clr,
enum _page_table_type ptt, uint32_t type)
@@ -125,7 +125,7 @@ static void modify_or_del_pte(uint64_t *pde,
* type: MR_DEL
* delete [vaddr_start, vaddr_end) MT PT mapping
*/
static void modify_or_del_pde(uint64_t *pdpte,
static void modify_or_del_pde(const uint64_t *pdpte,
uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot_set, uint64_t prot_clr,
enum _page_table_type ptt, uint32_t type)
@@ -176,7 +176,7 @@ static void modify_or_del_pde(uint64_t *pdpte,
* type: MR_DEL
* delete [vaddr_start, vaddr_end) MT PT mapping
*/
static void modify_or_del_pdpte(uint64_t *pml4e,
static void modify_or_del_pdpte(const uint64_t *pml4e,
uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot_set, uint64_t prot_clr,
enum _page_table_type ptt, uint32_t type)
@@ -262,7 +262,7 @@ void mmu_modify_or_del(uint64_t *pml4_page,
* In PT level,
* add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping
*/
static void add_pte(uint64_t *pde, uint64_t paddr_start,
static void add_pte(const uint64_t *pde, uint64_t paddr_start,
uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot, enum _page_table_type ptt)
{
@@ -294,7 +294,7 @@ static void add_pte(uint64_t *pde, uint64_t paddr_start,
* In PD level,
* add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping
*/
static void add_pde(uint64_t *pdpte, uint64_t paddr_start,
static void add_pde(const uint64_t *pdpte, uint64_t paddr_start,
uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot, enum _page_table_type ptt)
{
@@ -340,7 +340,7 @@ static void add_pde(uint64_t *pdpte, uint64_t paddr_start,
* In PDPT level,
* add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping
*/
static void add_pdpte(uint64_t *pml4e, uint64_t paddr_start,
static void add_pdpte(const uint64_t *pml4e, uint64_t paddr_start,
uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot, enum _page_table_type ptt)
{

4
hypervisor/arch/x86/pm.c
View File

@@ -63,7 +63,7 @@ void restore_msrs(void)
#endif
}
static void acpi_gas_write(struct acpi_generic_address *gas, uint32_t val)
static void acpi_gas_write(const struct acpi_generic_address *gas, uint32_t val)
{
uint16_t val16 = (uint16_t)val;
@@ -74,7 +74,7 @@ static void acpi_gas_write(struct acpi_generic_address *gas, uint32_t val)
}
}
static uint32_t acpi_gas_read(struct acpi_generic_address *gas)
static uint32_t acpi_gas_read(const struct acpi_generic_address *gas)
{
uint32_t ret = 0U;

2
hypervisor/arch/x86/timer.c
View File

@@ -13,7 +13,7 @@
uint32_t tsc_khz = 0U;
static void run_timer(struct hv_timer *timer)
static void run_timer(const struct hv_timer *timer)
{
/* deadline = 0 means stop timer, we should skip */
if ((timer->func != NULL) && (timer->fire_tsc != 0UL)) {

6
hypervisor/arch/x86/trusty.c
View File

@@ -236,7 +236,7 @@ static void save_world_ctx(struct vcpu *vcpu, struct ext_context *ext_ctx)
: : "r" (ext_ctx->fxstore_guest_area) : "memory");
}
static void load_world_ctx(struct vcpu *vcpu, struct ext_context *ext_ctx)
static void load_world_ctx(struct vcpu *vcpu, const struct ext_context *ext_ctx)
{
/* mark to update on-demand run_context for efer/rflags/rsp */
bitmap_set_lock(CPU_REG_EFER, &vcpu->reg_updated);
@@ -283,7 +283,7 @@ static void load_world_ctx(struct vcpu *vcpu, struct ext_context *ext_ctx)
asm volatile("fxrstor (%0)" : : "r" (ext_ctx->fxstore_guest_area));
}
static void copy_smc_param(struct run_context *prev_ctx,
static void copy_smc_param(const struct run_context *prev_ctx,
struct run_context *next_ctx)
{
next_ctx->guest_cpu_regs.regs.rdi = prev_ctx->guest_cpu_regs.regs.rdi;
@@ -456,7 +456,7 @@ bool initialize_trusty(struct vcpu *vcpu, uint64_t param)
return false;
}
void trusty_set_dseed(void *dseed, uint8_t dseed_num)
void trusty_set_dseed(const void *dseed, uint8_t dseed_num)
{
/* Use fake seed if input param is invalid */
if ((dseed == NULL) || (dseed_num == 0U) ||

26
hypervisor/arch/x86/vtd.c
View File

@@ -170,12 +170,12 @@ static void register_hrhd_units(void)
}
}
static uint32_t iommu_read32(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
static uint32_t iommu_read32(const struct dmar_drhd_rt *dmar_uint, uint32_t offset)
{
return mmio_read32(hpa2hva(dmar_uint->drhd->reg_base_addr + offset));
}
static uint64_t iommu_read64(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
static uint64_t iommu_read64(const struct dmar_drhd_rt *dmar_uint, uint32_t offset)
{
uint64_t value;
@@ -188,13 +188,13 @@ static uint64_t iommu_read64(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
return value;
}
static void iommu_write32(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
static void iommu_write32(const struct dmar_drhd_rt *dmar_uint, uint32_t offset,
uint32_t value)
{
mmio_write32(value, hpa2hva(dmar_uint->drhd->reg_base_addr + offset));
}
static void iommu_write64(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
static void iommu_write64(const struct dmar_drhd_rt *dmar_uint, uint32_t offset,
uint64_t value)
{
uint32_t temp;
@@ -208,7 +208,7 @@ static void iommu_write64(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
}
static inline void
dmar_wait_completion(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
dmar_wait_completion(const struct dmar_drhd_rt *dmar_uint, uint32_t offset,
uint32_t mask, bool pre_condition, uint32_t *status)
{
/* variable start isn't used when built as release version */
@@ -239,7 +239,7 @@ dmar_wait_completion(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
}
/* flush cache when root table, context table updated */
static void iommu_flush_cache(struct dmar_drhd_rt *dmar_uint,
static void iommu_flush_cache(const struct dmar_drhd_rt *dmar_uint,
void *p, uint32_t size)
{
uint32_t i;
@@ -335,7 +335,7 @@ static inline uint8_t width_to_agaw(uint32_t width)
return width_to_level(width) - 2U;
}
static uint8_t dmar_uint_get_msagw(struct dmar_drhd_rt *dmar_uint)
static uint8_t dmar_uint_get_msagw(const struct dmar_drhd_rt *dmar_uint)
{
uint8_t i;
uint8_t sgaw = iommu_cap_sagaw(dmar_uint->cap);
@@ -350,7 +350,7 @@ static uint8_t dmar_uint_get_msagw(struct dmar_drhd_rt *dmar_uint)
}
static bool
dmar_unit_support_aw(struct dmar_drhd_rt *dmar_uint, uint32_t addr_width)
dmar_unit_support_aw(const struct dmar_drhd_rt *dmar_uint, uint32_t addr_width)
{
uint8_t aw;
@@ -935,7 +935,7 @@ struct iommu_domain *create_iommu_domain(uint16_t vm_id, uint64_t translation_ta
/**
* @pre domain != NULL
*/
void destroy_iommu_domain(struct iommu_domain *domain)
void destroy_iommu_domain(const struct iommu_domain *domain)
{
/* currently only support ept */
if (!domain->is_tt_ept) {
@@ -952,7 +952,7 @@ void destroy_iommu_domain(struct iommu_domain *domain)
free(domain);
}
static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
static int add_iommu_device(const struct iommu_domain *domain, uint16_t segment,
uint8_t bus, uint8_t devfun)
{
struct dmar_drhd_rt *dmar_uint;
@@ -1100,7 +1100,7 @@ static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
}
static int
remove_iommu_device(struct iommu_domain *domain, uint16_t segment,
remove_iommu_device(const struct iommu_domain *domain, uint16_t segment,
uint8_t bus, uint8_t devfun)
{
struct dmar_drhd_rt *dmar_uint;
@@ -1156,7 +1156,7 @@ remove_iommu_device(struct iommu_domain *domain, uint16_t segment,
return 0;
}
int assign_iommu_device(struct iommu_domain *domain, uint8_t bus,
int assign_iommu_device(const struct iommu_domain *domain, uint8_t bus,
uint8_t devfun)
{
if (domain == NULL) {
@@ -1171,7 +1171,7 @@ int assign_iommu_device(struct iommu_domain *domain, uint8_t bus,
return add_iommu_device(domain, 0U, bus, devfun);
}
int unassign_iommu_device(struct iommu_domain *domain, uint8_t bus,
int unassign_iommu_device(const struct iommu_domain *domain, uint8_t bus,
uint8_t devfun)
{
if (domain == NULL) {