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HV:fix "Pointer param should be declared pointer to const"

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Fix violations for function whose parameter can be read-only.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Huihuang Shi 2018-10-23 11:45:29 +08:00 committed by wenlingz
parent d79007ae70
commit ea32c34ae1
39 changed files with 149 additions and 149 deletions
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12
hypervisor/arch/x86/assign.c
View File

@ -17,7 +17,7 @@
*/ */
static inline struct ptdev_remapping_info * static inline struct ptdev_remapping_info *
ptdev_lookup_entry_by_sid(uint32_t intr_type, ptdev_lookup_entry_by_sid(uint32_t intr_type,
union source_id *sid,const struct vm *vm) const union source_id *sid,const struct vm *vm)
{ {
struct ptdev_remapping_info *entry; struct ptdev_remapping_info *entry;
struct list_head *pos; struct list_head *pos;
@ -38,12 +38,12 @@ ptdev_lookup_entry_by_sid(uint32_t intr_type,
} }
static inline bool static inline bool
is_entry_active(struct ptdev_remapping_info *entry) is_entry_active(const struct ptdev_remapping_info *entry)
{ {
return atomic_load32(&entry->active) == ACTIVE_FLAG; return atomic_load32(&entry->active) == ACTIVE_FLAG;
} }
static bool ptdev_hv_owned_intx(const struct vm *vm, union source_id *virt_sid) static bool ptdev_hv_owned_intx(const struct vm *vm, const union source_id *virt_sid)
{ {
/* vm0 vuart pin is owned by hypervisor under debug version */ /* vm0 vuart pin is owned by hypervisor under debug version */
if (is_vm0(vm) && (virt_sid->intx_id.pin == COM1_IRQ)) { if (is_vm0(vm) && (virt_sid->intx_id.pin == COM1_IRQ)) {
@ -377,9 +377,9 @@ END:
} }
static void ptdev_intr_handle_irq(struct vm *vm, static void ptdev_intr_handle_irq(struct vm *vm,
struct ptdev_remapping_info *entry) const struct ptdev_remapping_info *entry)
{ {
union source_id *virt_sid = &entry->virt_sid; const union source_id *virt_sid = &entry->virt_sid;
switch (virt_sid->intx_id.src) { switch (virt_sid->intx_id.src) {
case PTDEV_VPIN_IOAPIC: case PTDEV_VPIN_IOAPIC:
{ {
@ -790,7 +790,7 @@ void ptdev_remove_msix_remapping(const struct vm *vm, uint16_t virt_bdf,
#ifdef HV_DEBUG #ifdef HV_DEBUG
#define PTDEV_INVALID_PIN 0xffU #define PTDEV_INVALID_PIN 0xffU
static void get_entry_info(struct ptdev_remapping_info *entry, char *type, static void get_entry_info(const struct ptdev_remapping_info *entry, char *type,
uint32_t *irq, uint32_t *vector, uint64_t *dest, bool *lvl_tm, uint32_t *irq, uint32_t *vector, uint64_t *dest, bool *lvl_tm,
uint8_t *pin, uint8_t *vpin, uint32_t *bdf, uint32_t *vbdf) uint8_t *pin, uint8_t *vpin, uint32_t *bdf, uint32_t *vbdf)
{ {

2
hypervisor/arch/x86/guest/guest.c
View File

@ -72,7 +72,7 @@ enum vm_paging_mode get_vcpu_paging_mode(struct vcpu *vcpu)
/* TODO: Add code to check for Revserved bits, SMAP and PKE when do translation /* TODO: Add code to check for Revserved bits, SMAP and PKE when do translation
* during page walk */ * during page walk */
static int local_gva2gpa_common(struct vcpu *vcpu, struct page_walk_info *pw_info, static int local_gva2gpa_common(struct vcpu *vcpu, const struct page_walk_info *pw_info,
uint64_t gva, uint64_t *gpa, uint32_t *err_code) uint64_t gva, uint64_t *gpa, uint32_t *err_code)
{ {
uint32_t i; uint32_t i;

30
hypervisor/arch/x86/guest/instr_emul.c
View File

@ -512,7 +512,7 @@ static int mmio_write(struct vcpu *vcpu, uint64_t wval)
return 0; return 0;
} }
static void vie_calc_bytereg(struct instr_emul_vie *vie, static void vie_calc_bytereg(const struct instr_emul_vie *vie,
enum cpu_reg_name *reg, int *lhbr) enum cpu_reg_name *reg, int *lhbr)
{ {
*lhbr = 0; *lhbr = 0;
@ -538,7 +538,7 @@ static void vie_calc_bytereg(struct instr_emul_vie *vie,
} }
} }
static uint8_t vie_read_bytereg(struct vcpu *vcpu, struct instr_emul_vie *vie) static uint8_t vie_read_bytereg(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int lhbr; int lhbr;
uint64_t val; uint64_t val;
@ -561,7 +561,7 @@ static uint8_t vie_read_bytereg(struct vcpu *vcpu, struct instr_emul_vie *vie)
return reg_val; return reg_val;
} }
static void vie_write_bytereg(struct vcpu *vcpu, struct instr_emul_vie *vie, static void vie_write_bytereg(struct vcpu *vcpu, const struct instr_emul_vie *vie,
uint8_t byte) uint8_t byte)
{ {
uint64_t origval, val, mask; uint64_t origval, val, mask;
@ -664,7 +664,7 @@ static uint64_t getcc(uint8_t opsize, uint64_t x, uint64_t y)
} }
} }
static int emulate_mov(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_mov(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error; int error;
uint8_t size; uint8_t size;
@ -780,7 +780,7 @@ static int emulate_mov(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error; return error;
} }
static int emulate_movx(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_movx(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error; int error;
uint8_t size; uint8_t size;
@ -980,7 +980,7 @@ exception_inject:
* For MOVs instruction, we always check RDI during instruction decoding phase. * For MOVs instruction, we always check RDI during instruction decoding phase.
* And access RSI without any check during instruction emulation phase. * And access RSI without any check during instruction emulation phase.
*/ */
static int emulate_movs(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_movs(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
uint64_t src_gva, gpa, val = 0UL; uint64_t src_gva, gpa, val = 0UL;
uint64_t *dst_hva, *src_hva; uint64_t *dst_hva, *src_hva;
@ -1067,7 +1067,7 @@ done:
return error; return error;
} }
static int emulate_stos(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_stos(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error, repeat; int error, repeat;
uint8_t opsize = vie->opsize; uint8_t opsize = vie->opsize;
@ -1121,7 +1121,7 @@ static int emulate_stos(struct vcpu *vcpu, struct instr_emul_vie *vie)
return 0; return 0;
} }
static int emulate_test(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_test(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error; int error;
uint8_t size; uint8_t size;
@ -1187,7 +1187,7 @@ static int emulate_test(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error; return error;
} }
static int emulate_and(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_and(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error; int error;
uint8_t size; uint8_t size;
@ -1275,7 +1275,7 @@ static int emulate_and(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error; return error;
} }
static int emulate_or(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_or(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error; int error;
uint8_t size; uint8_t size;
@ -1366,7 +1366,7 @@ static int emulate_or(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error; return error;
} }
static int emulate_cmp(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_cmp(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error; int error;
uint8_t size; uint8_t size;
@ -1458,7 +1458,7 @@ static int emulate_cmp(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error; return error;
} }
static int emulate_sub(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_sub(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error; int error;
uint8_t size; uint8_t size;
@ -1512,7 +1512,7 @@ static int emulate_sub(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error; return error;
} }
static int emulate_group1(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_group1(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
int error; int error;
@ -1534,7 +1534,7 @@ static int emulate_group1(struct vcpu *vcpu, struct instr_emul_vie *vie)
return error; return error;
} }
static int emulate_bittest(struct vcpu *vcpu, struct instr_emul_vie *vie) static int emulate_bittest(struct vcpu *vcpu, const struct instr_emul_vie *vie)
{ {
uint64_t val, rflags, bitmask; uint64_t val, rflags, bitmask;
int error; int error;
@ -1664,7 +1664,7 @@ static int vie_init(struct instr_emul_vie *vie, struct vcpu *vcpu)
return 0; return 0;
} }
static int vie_peek(struct instr_emul_vie *vie, uint8_t *x) static int vie_peek(const struct instr_emul_vie *vie, uint8_t *x)
{ {
if (vie->num_processed < vie->num_valid) { if (vie->num_processed < vie->num_valid) {

2
hypervisor/arch/x86/guest/pm.c
View File

@ -187,7 +187,7 @@ static void pm1ab_io_write(__unused struct vm *vm, uint16_t addr, size_t width,
} }
static void static void
register_gas_io_handler(struct vm *vm, struct acpi_generic_address *gas) register_gas_io_handler(struct vm *vm, const struct acpi_generic_address *gas)
{ {
uint8_t io_len[5] = {0, 1, 2, 4, 8}; uint8_t io_len[5] = {0, 1, 2, 4, 8};
struct vm_io_range gas_io; struct vm_io_range gas_io;

2
hypervisor/arch/x86/guest/ucode.c
View File

@ -27,7 +27,7 @@ uint64_t get_microcode_version(void)
* According to SDM vol 3 Table 9-7. If data_size field of uCode * According to SDM vol 3 Table 9-7. If data_size field of uCode
* header is zero, the ucode length is 2000 * header is zero, the ucode length is 2000
*/ */
static inline size_t get_ucode_data_size(struct ucode_header *uhdr) static inline size_t get_ucode_data_size(const struct ucode_header *uhdr)
{ {
return ((uhdr->data_size != 0U) ? uhdr->data_size : 2000U); return ((uhdr->data_size != 0U) ? uhdr->data_size : 2000U);
} }

64
hypervisor/arch/x86/guest/vlapic.c
View File

@ -88,10 +88,10 @@ static int
apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector); apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector);
static int static int
apicv_pending_intr(struct acrn_vlapic *vlapic); apicv_pending_intr(const struct acrn_vlapic *vlapic);
static void static void
apicv_batch_set_tmr(struct acrn_vlapic *vlapic); apicv_batch_set_tmr(const struct acrn_vlapic *vlapic);
/* /*
* Post an interrupt to the vcpu running on 'hostcpu'. This will use a * Post an interrupt to the vcpu running on 'hostcpu'. This will use a
@ -154,23 +154,23 @@ vm_active_cpus(const struct vm *vm)
} }
uint32_t uint32_t
vlapic_get_id(struct acrn_vlapic *vlapic) vlapic_get_id(const struct acrn_vlapic *vlapic)
{ {
uint32_t id = vlapic->apic_page.id.v; uint32_t id = vlapic->apic_page.id.v;
return id; return id;
} }
uint8_t uint8_t
vlapic_get_apicid(struct acrn_vlapic *vlapic) vlapic_get_apicid(const struct acrn_vlapic *vlapic)
{ {
uint32_t apicid = (vlapic->apic_page.id.v) >> APIC_ID_SHIFT; uint32_t apicid = (vlapic->apic_page.id.v) >> APIC_ID_SHIFT;
return (uint8_t)apicid; return (uint8_t)apicid;
} }
static inline uint32_t static inline uint32_t
vlapic_build_id(struct acrn_vlapic *vlapic) vlapic_build_id(const struct acrn_vlapic *vlapic)
{ {
struct vcpu *vcpu = vlapic->vcpu; const struct vcpu *vcpu = vlapic->vcpu;
uint8_t vlapic_id; uint8_t vlapic_id;
uint32_t lapic_regs_id; uint32_t lapic_regs_id;
@ -236,28 +236,28 @@ vlapic_timer_divisor_shift(uint32_t dcr)
} }
static inline bool static inline bool
vlapic_lvtt_oneshot(struct acrn_vlapic *vlapic) vlapic_lvtt_oneshot(const struct acrn_vlapic *vlapic)
{ {
return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM)
== APIC_LVTT_TM_ONE_SHOT); == APIC_LVTT_TM_ONE_SHOT);
} }
static inline bool static inline bool
vlapic_lvtt_period(struct acrn_vlapic *vlapic) vlapic_lvtt_period(const struct acrn_vlapic *vlapic)
{ {
return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM)
== APIC_LVTT_TM_PERIODIC); == APIC_LVTT_TM_PERIODIC);
} }
static inline bool static inline bool
vlapic_lvtt_tsc_deadline(struct acrn_vlapic *vlapic) vlapic_lvtt_tsc_deadline(const struct acrn_vlapic *vlapic)
{ {
return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM) return (((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_TM)
== APIC_LVTT_TM_TSCDLT); == APIC_LVTT_TM_TSCDLT);
} }
static inline bool static inline bool
vlapic_lvtt_masked(struct acrn_vlapic *vlapic) vlapic_lvtt_masked(const struct acrn_vlapic *vlapic)
{ {
return ((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_M) return ((vlapic->apic_page.lvt[APIC_LVT_TIMER].v) & APIC_LVTT_M)
!= 0U; != 0U;
@ -343,11 +343,11 @@ static void vlapic_update_lvtt(struct acrn_vlapic *vlapic,
} }
} }
static uint32_t vlapic_get_ccr(struct acrn_vlapic *vlapic) static uint32_t vlapic_get_ccr(const struct acrn_vlapic *vlapic)
{ {
uint64_t now = rdtsc(); uint64_t now = rdtsc();
uint32_t remain_count = 0U; uint32_t remain_count = 0U;
struct vlapic_timer *vtimer; const struct vlapic_timer *vtimer;
vtimer = &vlapic->vtimer; vtimer = &vlapic->vtimer;
@ -400,7 +400,7 @@ static void vlapic_icrtmr_write_handler(struct acrn_vlapic *vlapic)
} }
} }
static uint64_t vlapic_get_tsc_deadline_msr(struct acrn_vlapic *vlapic) static uint64_t vlapic_get_tsc_deadline_msr(const struct acrn_vlapic *vlapic)
{ {
if (!vlapic_lvtt_tsc_deadline(vlapic)) { if (!vlapic_lvtt_tsc_deadline(vlapic)) {
return 0; return 0;
@ -621,7 +621,7 @@ vlapic_get_lvtptr(struct acrn_vlapic *vlapic, uint32_t offset)
} }
static inline uint32_t static inline uint32_t
vlapic_get_lvt(struct acrn_vlapic *vlapic, uint32_t offset) vlapic_get_lvt(const struct acrn_vlapic *vlapic, uint32_t offset)
{ {
uint32_t idx, val; uint32_t idx, val;
@ -762,10 +762,10 @@ vlapic_fire_lvt(struct acrn_vlapic *vlapic, uint32_t lvt)
} }
static void static void
dump_isrvec_stk(struct acrn_vlapic *vlapic) dump_isrvec_stk(const struct acrn_vlapic *vlapic)
{ {
uint32_t i; uint32_t i;
struct lapic_reg *isrptr; const struct lapic_reg *isrptr;
isrptr = &(vlapic->apic_page.isr[0]); isrptr = &(vlapic->apic_page.isr[0]);
for (i = 0U; i < 8U; i++) { for (i = 0U; i < 8U; i++) {
@ -1095,9 +1095,9 @@ vlapic_set_tpr(struct acrn_vlapic *vlapic, uint32_t val)
} }
static uint32_t static uint32_t
vlapic_get_tpr(struct acrn_vlapic *vlapic) vlapic_get_tpr(const struct acrn_vlapic *vlapic)
{ {
struct lapic_regs *lapic = &(vlapic->apic_page); const struct lapic_regs *lapic = &(vlapic->apic_page);
return lapic->tpr.v; return lapic->tpr.v;
} }
@ -1119,7 +1119,7 @@ vlapic_set_cr8(struct acrn_vlapic *vlapic, uint64_t val)
} }
uint64_t uint64_t
vlapic_get_cr8(struct acrn_vlapic *vlapic) vlapic_get_cr8(const struct acrn_vlapic *vlapic)
{ {
uint32_t tpr; uint32_t tpr;
@ -1252,11 +1252,11 @@ vlapic_icrlo_write_handler(struct acrn_vlapic *vlapic)
} }
int int
vlapic_pending_intr(struct acrn_vlapic *vlapic, uint32_t *vecptr) vlapic_pending_intr(const struct acrn_vlapic *vlapic, uint32_t *vecptr)
{ {
struct lapic_regs *lapic = &(vlapic->apic_page); const struct lapic_regs *lapic = &(vlapic->apic_page);
uint32_t i, vector, val, bitpos; uint32_t i, vector, val, bitpos;
struct lapic_reg *irrptr; const struct lapic_reg *irrptr;
if (is_apicv_intr_delivery_supported()) { if (is_apicv_intr_delivery_supported()) {
return apicv_pending_intr(vlapic); return apicv_pending_intr(vlapic);
@ -1647,7 +1647,7 @@ vlapic_init(struct acrn_vlapic *vlapic)
vlapic_reset(vlapic); vlapic_reset(vlapic);
} }
void vlapic_restore(struct acrn_vlapic *vlapic, struct lapic_regs *regs) void vlapic_restore(struct acrn_vlapic *vlapic, const struct lapic_regs *regs)
{ {
struct lapic_regs *lapic; struct lapic_regs *lapic;
int i; int i;
@ -1674,7 +1674,7 @@ void vlapic_restore(struct acrn_vlapic *vlapic, struct lapic_regs *regs)
} }
static uint64_t static uint64_t
vlapic_get_apicbase(struct acrn_vlapic *vlapic) vlapic_get_apicbase(const struct acrn_vlapic *vlapic)
{ {
return vlapic->msr_apicbase; return vlapic->msr_apicbase;
@ -1738,9 +1738,9 @@ vlapic_deliver_intr(struct vm *vm, bool level, uint32_t dest, bool phys,
} }
bool bool
vlapic_enabled(struct acrn_vlapic *vlapic) vlapic_enabled(const struct acrn_vlapic *vlapic)
{ {
struct lapic_regs *lapic = &(vlapic->apic_page); const struct lapic_regs *lapic = &(vlapic->apic_page);
if (((vlapic->msr_apicbase & APICBASE_ENABLED) != 0UL) && if (((vlapic->msr_apicbase & APICBASE_ENABLED) != 0UL) &&
((lapic->svr.v & APIC_SVR_ENABLE) != 0U)) { ((lapic->svr.v & APIC_SVR_ENABLE) != 0U)) {
@ -2055,10 +2055,10 @@ apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector)
} }
static int static int
apicv_pending_intr(struct acrn_vlapic *vlapic) apicv_pending_intr(const struct acrn_vlapic *vlapic)
{ {
struct vlapic_pir_desc *pir_desc; const struct vlapic_pir_desc *pir_desc;
struct lapic_regs *lapic; const struct lapic_regs *lapic;
uint64_t pending, pirval; uint64_t pending, pirval;
uint32_t i, ppr, vpr; uint32_t i, ppr, vpr;
@ -2093,11 +2093,11 @@ apicv_pending_intr(struct acrn_vlapic *vlapic)
#define EOI_STEP_LEN (64U) #define EOI_STEP_LEN (64U)
#define TMR_STEP_LEN (32U) #define TMR_STEP_LEN (32U)
static void static void
apicv_batch_set_tmr(struct acrn_vlapic *vlapic) apicv_batch_set_tmr(const struct acrn_vlapic *vlapic)
{ {
struct lapic_regs *lapic = &(vlapic->apic_page); const struct lapic_regs *lapic = &(vlapic->apic_page);
uint64_t val; uint64_t val;
struct lapic_reg *ptr; const struct lapic_reg *ptr;
uint32_t s, e; uint32_t s, e;
ptr = &lapic->tmr[0]; ptr = &lapic->tmr[0];

10
hypervisor/arch/x86/io.c
View File

@ -22,9 +22,9 @@ static void complete_ioreq(struct vhm_request *vhm_req)
* request having transferred to the COMPLETE state. * request having transferred to the COMPLETE state.
*/ */
static void static void
emulate_pio_post(struct vcpu *vcpu, struct io_request *io_req) emulate_pio_post(struct vcpu *vcpu, const struct io_request *io_req)
{ {
struct pio_request *pio_req = &io_req->reqs.pio; const struct pio_request *pio_req = &io_req->reqs.pio;
uint64_t mask = 0xFFFFFFFFUL >> (32UL - 8UL * pio_req->size); uint64_t mask = 0xFFFFFFFFUL >> (32UL - 8UL * pio_req->size);
if (pio_req->direction == REQUEST_READ) { if (pio_req->direction == REQUEST_READ) {
@ -68,9 +68,9 @@ void dm_emulate_pio_post(struct vcpu *vcpu)
* either a previous call to emulate_io() returning 0 or the corresponding VHM * either a previous call to emulate_io() returning 0 or the corresponding VHM
* request having transferred to the COMPLETE state. * request having transferred to the COMPLETE state.
*/ */
void emulate_mmio_post(struct vcpu *vcpu, struct io_request *io_req) void emulate_mmio_post(struct vcpu *vcpu, const struct io_request *io_req)
{ {
struct mmio_request *mmio_req = &io_req->reqs.mmio; const struct mmio_request *mmio_req = &io_req->reqs.mmio;
if (mmio_req->direction == REQUEST_READ) { if (mmio_req->direction == REQUEST_READ) {
/* Emulate instruction and update vcpu register set */ /* Emulate instruction and update vcpu register set */
@ -451,7 +451,7 @@ void setup_io_bitmap(struct vm *vm)
} }
} }
void register_io_emulation_handler(struct vm *vm, struct vm_io_range *range, void register_io_emulation_handler(struct vm *vm, const struct vm_io_range *range,
io_read_fn_t io_read_fn_ptr, io_read_fn_t io_read_fn_ptr,
io_write_fn_t io_write_fn_ptr) io_write_fn_t io_write_fn_ptr)
{ {

8
hypervisor/arch/x86/irq.c
View File

@ -285,14 +285,14 @@ static void handle_spurious_interrupt(uint32_t vector)
} }
} }
static inline bool irq_need_mask(struct irq_desc *desc) static inline bool irq_need_mask(const struct irq_desc *desc)
{ {
/* level triggered gsi should be masked */ /* level triggered gsi should be masked */
return (((desc->flags & IRQF_LEVEL) != 0U) return (((desc->flags & IRQF_LEVEL) != 0U)
&& irq_is_gsi(desc->irq)); && irq_is_gsi(desc->irq));
} }
static inline bool irq_need_unmask(struct irq_desc *desc) static inline bool irq_need_unmask(const struct irq_desc *desc)
{ {
/* level triggered gsi for non-ptdev should be unmasked */ /* level triggered gsi for non-ptdev should be unmasked */
return (((desc->flags & IRQF_LEVEL) != 0U) return (((desc->flags & IRQF_LEVEL) != 0U)
@ -300,7 +300,7 @@ static inline bool irq_need_unmask(struct irq_desc *desc)
&& irq_is_gsi(desc->irq)); && irq_is_gsi(desc->irq));
} }
static inline void handle_irq(struct irq_desc *desc) static inline void handle_irq(const struct irq_desc *desc)
{ {
irq_action_t action = desc->action; irq_action_t action = desc->action;
@ -321,7 +321,7 @@ static inline void handle_irq(struct irq_desc *desc)
} }
/* do_IRQ() */ /* do_IRQ() */
void dispatch_interrupt(struct intr_excp_ctx *ctx) void dispatch_interrupt(const struct intr_excp_ctx *ctx)
{ {
uint32_t vr = ctx->vector; uint32_t vr = ctx->vector;
uint32_t irq = vector_to_irq[vr]; uint32_t irq = vector_to_irq[vr];

2
hypervisor/arch/x86/lapic.c
View File

@ -199,7 +199,7 @@ void save_lapic(struct lapic_regs *regs)
(uint32_t) msr_read(MSR_IA32_EXT_APIC_DIV_CONF); (uint32_t) msr_read(MSR_IA32_EXT_APIC_DIV_CONF);
} }
static void restore_lapic(struct lapic_regs *regs) static void restore_lapic(const struct lapic_regs *regs)
{ {
msr_write(MSR_IA32_EXT_APIC_TPR, (uint64_t) regs->tpr.v); msr_write(MSR_IA32_EXT_APIC_TPR, (uint64_t) regs->tpr.v);
msr_write(MSR_IA32_EXT_APIC_SIVR, (uint64_t) regs->svr.v); msr_write(MSR_IA32_EXT_APIC_SIVR, (uint64_t) regs->svr.v);

12
hypervisor/arch/x86/pagetable.c
View File

@ -92,7 +92,7 @@ static inline int construct_pgentry(enum _page_table_type ptt, uint64_t *pde)
* type: MR_DEL * type: MR_DEL
* delete [vaddr_start, vaddr_end) MT PT mapping * delete [vaddr_start, vaddr_end) MT PT mapping
*/ */
static void modify_or_del_pte(uint64_t *pde, static void modify_or_del_pte(const uint64_t *pde,
uint64_t vaddr_start, uint64_t vaddr_end, uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot_set, uint64_t prot_clr, uint64_t prot_set, uint64_t prot_clr,
enum _page_table_type ptt, uint32_t type) enum _page_table_type ptt, uint32_t type)
@ -125,7 +125,7 @@ static void modify_or_del_pte(uint64_t *pde,
* type: MR_DEL * type: MR_DEL
* delete [vaddr_start, vaddr_end) MT PT mapping * delete [vaddr_start, vaddr_end) MT PT mapping
*/ */
static void modify_or_del_pde(uint64_t *pdpte, static void modify_or_del_pde(const uint64_t *pdpte,
uint64_t vaddr_start, uint64_t vaddr_end, uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot_set, uint64_t prot_clr, uint64_t prot_set, uint64_t prot_clr,
enum _page_table_type ptt, uint32_t type) enum _page_table_type ptt, uint32_t type)
@ -176,7 +176,7 @@ static void modify_or_del_pde(uint64_t *pdpte,
* type: MR_DEL * type: MR_DEL
* delete [vaddr_start, vaddr_end) MT PT mapping * delete [vaddr_start, vaddr_end) MT PT mapping
*/ */
static void modify_or_del_pdpte(uint64_t *pml4e, static void modify_or_del_pdpte(const uint64_t *pml4e,
uint64_t vaddr_start, uint64_t vaddr_end, uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot_set, uint64_t prot_clr, uint64_t prot_set, uint64_t prot_clr,
enum _page_table_type ptt, uint32_t type) enum _page_table_type ptt, uint32_t type)
@ -262,7 +262,7 @@ void mmu_modify_or_del(uint64_t *pml4_page,
* In PT level, * In PT level,
* add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping * add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping
*/ */
static void add_pte(uint64_t *pde, uint64_t paddr_start, static void add_pte(const uint64_t *pde, uint64_t paddr_start,
uint64_t vaddr_start, uint64_t vaddr_end, uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot, enum _page_table_type ptt) uint64_t prot, enum _page_table_type ptt)
{ {
@ -294,7 +294,7 @@ static void add_pte(uint64_t *pde, uint64_t paddr_start,
* In PD level, * In PD level,
* add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping * add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping
*/ */
static void add_pde(uint64_t *pdpte, uint64_t paddr_start, static void add_pde(const uint64_t *pdpte, uint64_t paddr_start,
uint64_t vaddr_start, uint64_t vaddr_end, uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot, enum _page_table_type ptt) uint64_t prot, enum _page_table_type ptt)
{ {
@ -340,7 +340,7 @@ static void add_pde(uint64_t *pdpte, uint64_t paddr_start,
* In PDPT level, * In PDPT level,
* add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping * add [vaddr_start, vaddr_end) to [paddr_base, ...) MT PT mapping
*/ */
static void add_pdpte(uint64_t *pml4e, uint64_t paddr_start, static void add_pdpte(const uint64_t *pml4e, uint64_t paddr_start,
uint64_t vaddr_start, uint64_t vaddr_end, uint64_t vaddr_start, uint64_t vaddr_end,
uint64_t prot, enum _page_table_type ptt) uint64_t prot, enum _page_table_type ptt)
{ {

4
hypervisor/arch/x86/pm.c
View File

@ -63,7 +63,7 @@ void restore_msrs(void)
#endif #endif
} }
static void acpi_gas_write(struct acpi_generic_address *gas, uint32_t val) static void acpi_gas_write(const struct acpi_generic_address *gas, uint32_t val)
{ {
uint16_t val16 = (uint16_t)val; uint16_t val16 = (uint16_t)val;
@ -74,7 +74,7 @@ static void acpi_gas_write(struct acpi_generic_address *gas, uint32_t val)
} }
} }
static uint32_t acpi_gas_read(struct acpi_generic_address *gas) static uint32_t acpi_gas_read(const struct acpi_generic_address *gas)
{ {
uint32_t ret = 0U; uint32_t ret = 0U;

2
hypervisor/arch/x86/timer.c
View File

@ -13,7 +13,7 @@
uint32_t tsc_khz = 0U; uint32_t tsc_khz = 0U;
static void run_timer(struct hv_timer *timer) static void run_timer(const struct hv_timer *timer)
{ {
/* deadline = 0 means stop timer, we should skip */ /* deadline = 0 means stop timer, we should skip */
if ((timer->func != NULL) && (timer->fire_tsc != 0UL)) { if ((timer->func != NULL) && (timer->fire_tsc != 0UL)) {

6
hypervisor/arch/x86/trusty.c
View File

@ -236,7 +236,7 @@ static void save_world_ctx(struct vcpu *vcpu, struct ext_context *ext_ctx)
: : "r" (ext_ctx->fxstore_guest_area) : "memory"); : : "r" (ext_ctx->fxstore_guest_area) : "memory");
} }
static void load_world_ctx(struct vcpu *vcpu, struct ext_context *ext_ctx) static void load_world_ctx(struct vcpu *vcpu, const struct ext_context *ext_ctx)
{ {
/* mark to update on-demand run_context for efer/rflags/rsp */ /* mark to update on-demand run_context for efer/rflags/rsp */
bitmap_set_lock(CPU_REG_EFER, &vcpu->reg_updated); bitmap_set_lock(CPU_REG_EFER, &vcpu->reg_updated);
@ -283,7 +283,7 @@ static void load_world_ctx(struct vcpu *vcpu, struct ext_context *ext_ctx)
asm volatile("fxrstor (%0)" : : "r" (ext_ctx->fxstore_guest_area)); asm volatile("fxrstor (%0)" : : "r" (ext_ctx->fxstore_guest_area));
} }
static void copy_smc_param(struct run_context *prev_ctx, static void copy_smc_param(const struct run_context *prev_ctx,
struct run_context *next_ctx) struct run_context *next_ctx)
{ {
next_ctx->guest_cpu_regs.regs.rdi = prev_ctx->guest_cpu_regs.regs.rdi; next_ctx->guest_cpu_regs.regs.rdi = prev_ctx->guest_cpu_regs.regs.rdi;
@ -456,7 +456,7 @@ bool initialize_trusty(struct vcpu *vcpu, uint64_t param)
return false; return false;
} }
void trusty_set_dseed(void *dseed, uint8_t dseed_num) void trusty_set_dseed(const void *dseed, uint8_t dseed_num)
{ {
/* Use fake seed if input param is invalid */ /* Use fake seed if input param is invalid */
if ((dseed == NULL) || (dseed_num == 0U) || if ((dseed == NULL) || (dseed_num == 0U) ||

26
hypervisor/arch/x86/vtd.c
View File

@ -170,12 +170,12 @@ static void register_hrhd_units(void)
} }
} }
static uint32_t iommu_read32(struct dmar_drhd_rt *dmar_uint, uint32_t offset) static uint32_t iommu_read32(const struct dmar_drhd_rt *dmar_uint, uint32_t offset)
{ {
return mmio_read32(hpa2hva(dmar_uint->drhd->reg_base_addr + offset)); return mmio_read32(hpa2hva(dmar_uint->drhd->reg_base_addr + offset));
} }
static uint64_t iommu_read64(struct dmar_drhd_rt *dmar_uint, uint32_t offset) static uint64_t iommu_read64(const struct dmar_drhd_rt *dmar_uint, uint32_t offset)
{ {
uint64_t value; uint64_t value;
@ -188,13 +188,13 @@ static uint64_t iommu_read64(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
return value; return value;
} }
static void iommu_write32(struct dmar_drhd_rt *dmar_uint, uint32_t offset, static void iommu_write32(const struct dmar_drhd_rt *dmar_uint, uint32_t offset,
uint32_t value) uint32_t value)
{ {
mmio_write32(value, hpa2hva(dmar_uint->drhd->reg_base_addr + offset)); mmio_write32(value, hpa2hva(dmar_uint->drhd->reg_base_addr + offset));
} }
static void iommu_write64(struct dmar_drhd_rt *dmar_uint, uint32_t offset, static void iommu_write64(const struct dmar_drhd_rt *dmar_uint, uint32_t offset,
uint64_t value) uint64_t value)
{ {
uint32_t temp; uint32_t temp;
@ -208,7 +208,7 @@ static void iommu_write64(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
} }
static inline void static inline void
dmar_wait_completion(struct dmar_drhd_rt *dmar_uint, uint32_t offset, dmar_wait_completion(const struct dmar_drhd_rt *dmar_uint, uint32_t offset,
uint32_t mask, bool pre_condition, uint32_t *status) uint32_t mask, bool pre_condition, uint32_t *status)
{ {
/* variable start isn't used when built as release version */ /* variable start isn't used when built as release version */
@ -239,7 +239,7 @@ dmar_wait_completion(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
} }
/* flush cache when root table, context table updated */ /* flush cache when root table, context table updated */
static void iommu_flush_cache(struct dmar_drhd_rt *dmar_uint, static void iommu_flush_cache(const struct dmar_drhd_rt *dmar_uint,
void *p, uint32_t size) void *p, uint32_t size)
{ {
uint32_t i; uint32_t i;
@ -335,7 +335,7 @@ static inline uint8_t width_to_agaw(uint32_t width)
return width_to_level(width) - 2U; return width_to_level(width) - 2U;
} }
static uint8_t dmar_uint_get_msagw(struct dmar_drhd_rt *dmar_uint) static uint8_t dmar_uint_get_msagw(const struct dmar_drhd_rt *dmar_uint)
{ {
uint8_t i; uint8_t i;
uint8_t sgaw = iommu_cap_sagaw(dmar_uint->cap); uint8_t sgaw = iommu_cap_sagaw(dmar_uint->cap);
@ -350,7 +350,7 @@ static uint8_t dmar_uint_get_msagw(struct dmar_drhd_rt *dmar_uint)
} }
static bool static bool
dmar_unit_support_aw(struct dmar_drhd_rt *dmar_uint, uint32_t addr_width) dmar_unit_support_aw(const struct dmar_drhd_rt *dmar_uint, uint32_t addr_width)
{ {
uint8_t aw; uint8_t aw;
@ -935,7 +935,7 @@ struct iommu_domain *create_iommu_domain(uint16_t vm_id, uint64_t translation_ta
/** /**
* @pre domain != NULL * @pre domain != NULL
*/ */
void destroy_iommu_domain(struct iommu_domain *domain) void destroy_iommu_domain(const struct iommu_domain *domain)
{ {
/* currently only support ept */ /* currently only support ept */
if (!domain->is_tt_ept) { if (!domain->is_tt_ept) {
@ -952,7 +952,7 @@ void destroy_iommu_domain(struct iommu_domain *domain)
free(domain); free(domain);
} }
static int add_iommu_device(struct iommu_domain *domain, uint16_t segment, static int add_iommu_device(const struct iommu_domain *domain, uint16_t segment,
uint8_t bus, uint8_t devfun) uint8_t bus, uint8_t devfun)
{ {
struct dmar_drhd_rt *dmar_uint; struct dmar_drhd_rt *dmar_uint;
@ -1100,7 +1100,7 @@ static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
} }
static int static int
remove_iommu_device(struct iommu_domain *domain, uint16_t segment, remove_iommu_device(const struct iommu_domain *domain, uint16_t segment,
uint8_t bus, uint8_t devfun) uint8_t bus, uint8_t devfun)
{ {
struct dmar_drhd_rt *dmar_uint; struct dmar_drhd_rt *dmar_uint;
@ -1156,7 +1156,7 @@ remove_iommu_device(struct iommu_domain *domain, uint16_t segment,
return 0; return 0;
} }
int assign_iommu_device(struct iommu_domain *domain, uint8_t bus, int assign_iommu_device(const struct iommu_domain *domain, uint8_t bus,
uint8_t devfun) uint8_t devfun)
{ {
if (domain == NULL) { if (domain == NULL) {
@ -1171,7 +1171,7 @@ int assign_iommu_device(struct iommu_domain *domain, uint8_t bus,
return add_iommu_device(domain, 0U, bus, devfun); return add_iommu_device(domain, 0U, bus, devfun);
} }
int unassign_iommu_device(struct iommu_domain *domain, uint8_t bus, int unassign_iommu_device(const struct iommu_domain *domain, uint8_t bus,
uint8_t devfun) uint8_t devfun)
{ {
if (domain == NULL) { if (domain == NULL) {

4
hypervisor/boot/acpi.c
View File

@ -318,13 +318,13 @@ void *get_dmar_table(void)
#define OFFSET_WAKE_VECTOR_64 24U #define OFFSET_WAKE_VECTOR_64 24U
/* get a dword value from given table and its offset */ /* get a dword value from given table and its offset */
static inline uint32_t get_acpi_dt_dword(uint8_t *dt_addr, uint32_t dt_offset) static inline uint32_t get_acpi_dt_dword(const uint8_t *dt_addr, uint32_t dt_offset)
{ {
return *(uint32_t *)(dt_addr + dt_offset); return *(uint32_t *)(dt_addr + dt_offset);
} }
/* get a qword value from given table and its offset */ /* get a qword value from given table and its offset */
static inline uint64_t get_acpi_dt_qword(uint8_t *dt_addr, uint32_t dt_offset) static inline uint64_t get_acpi_dt_qword(const uint8_t *dt_addr, uint32_t dt_offset)
{ {
return *(uint64_t *)(dt_addr + dt_offset); return *(uint64_t *)(dt_addr + dt_offset);
} }

4
hypervisor/boot/include/reloc.h
View File

@ -9,8 +9,8 @@
extern void relocate(void); extern void relocate(void);
extern uint64_t get_hv_image_delta(void); extern uint64_t get_hv_image_delta(void);
extern uint64_t get_hv_image_base(void); extern uint64_t get_hv_image_base(void);
extern uint64_t read_trampoline_sym(void *sym); extern uint64_t read_trampoline_sym(const void *sym);
extern void write_trampoline_sym(void *sym, uint64_t val); extern void write_trampoline_sym(const void *sym, uint64_t val);
extern uint64_t prepare_trampoline(void); extern uint64_t prepare_trampoline(void);
/* external symbols that are helpful for relocation */ /* external symbols that are helpful for relocation */

6
hypervisor/boot/reloc.c
View File

@ -65,7 +65,7 @@ uint64_t get_hv_image_base(void)
* - The HV code is always relocated to higher address, compared * - The HV code is always relocated to higher address, compared
* with CONFIG_RAM_START * with CONFIG_RAM_START
*/ */
static uint64_t trampoline_relo_addr(void *addr) static uint64_t trampoline_relo_addr(const void *addr)
{ {
return (uint64_t)addr - get_hv_image_delta(); return (uint64_t)addr - get_hv_image_delta();
} }
@ -143,7 +143,7 @@ void relocate(void)
#endif #endif
} }
uint64_t read_trampoline_sym(void *sym) uint64_t read_trampoline_sym(const void *sym)
{ {
uint64_t *hva; uint64_t *hva;
@ -151,7 +151,7 @@ uint64_t read_trampoline_sym(void *sym)
return *hva; return *hva;
} }
void write_trampoline_sym(void *sym, uint64_t val) void write_trampoline_sym(const void *sym, uint64_t val)
{ {
uint64_t *hva; uint64_t *hva;

2
hypervisor/boot/sbl/multiboot.c
View File

@ -73,7 +73,7 @@ static char kernel_cmdline[MEM_2K];
/* now modules support: FIRMWARE & RAMDISK & SeedList */ /* now modules support: FIRMWARE & RAMDISK & SeedList */
static void parse_other_modules(struct vm *vm, static void parse_other_modules(struct vm *vm,
struct multiboot_module *mods, uint32_t mods_count) const struct multiboot_module *mods, uint32_t mods_count)
{ {
uint32_t i; uint32_t i;

8
hypervisor/common/hypercall.c
View File

@ -73,7 +73,7 @@ int32_t hcall_get_api_version(struct vm *vm, uint64_t param)
*/ */
static int32_t static int32_t
handle_virt_irqline(const struct vm *vm, uint16_t target_vmid, handle_virt_irqline(const struct vm *vm, uint16_t target_vmid,
struct acrn_irqline *param, uint32_t operation) const struct acrn_irqline *param, uint32_t operation)
{ {
int32_t ret = 0; int32_t ret = 0;
uint32_t intr_type; uint32_t intr_type;
@ -334,7 +334,7 @@ int32_t hcall_set_vcpu_regs(struct vm *vm, uint16_t vmid, uint64_t param)
*@pre Pointer vm shall point to VM0 *@pre Pointer vm shall point to VM0
*/ */
int32_t hcall_set_irqline(const struct vm *vm, uint16_t vmid, int32_t hcall_set_irqline(const struct vm *vm, uint16_t vmid,
struct acrn_irqline_ops *ops) const struct acrn_irqline_ops *ops)
{ {
uint32_t irq_pic; uint32_t irq_pic;
struct vm *target_vm = get_vm_from_vmid(vmid); struct vm *target_vm = get_vm_from_vmid(vmid);
@ -459,7 +459,7 @@ int32_t hcall_notify_ioreq_finish(uint16_t vmid, uint16_t vcpu_id)
*@pre Pointer vm shall point to VM0 *@pre Pointer vm shall point to VM0
*/ */
static int32_t local_set_vm_memory_region(struct vm *vm, static int32_t local_set_vm_memory_region(struct vm *vm,
struct vm *target_vm, struct vm_memory_region *region) struct vm *target_vm, const struct vm_memory_region *region)
{ {
uint64_t hpa, base_paddr; uint64_t hpa, base_paddr;
uint64_t prot; uint64_t prot;
@ -602,7 +602,7 @@ int32_t hcall_set_vm_memory_regions(struct vm *vm, uint64_t param)
/** /**
*@pre Pointer vm shall point to VM0 *@pre Pointer vm shall point to VM0
*/ */
static int32_t write_protect_page(struct vm *vm, struct wp_data *wp) static int32_t write_protect_page(struct vm *vm,const struct wp_data *wp)
{ {
uint64_t hpa, base_paddr; uint64_t hpa, base_paddr;
uint64_t prot_set; uint64_t prot_set;

4
hypervisor/common/io_request.c
View File

@ -25,7 +25,7 @@ static void fire_vhm_interrupt(void)
vlapic_intr_edge(vcpu, acrn_vhm_vector); vlapic_intr_edge(vcpu, acrn_vhm_vector);
} }
static void acrn_print_request(uint16_t vcpu_id, struct vhm_request *req) static void acrn_print_request(uint16_t vcpu_id, const struct vhm_request *req)
{ {
switch (req->type) { switch (req->type) {
case REQ_MMIO: case REQ_MMIO:
@ -59,7 +59,7 @@ static void acrn_print_request(uint16_t vcpu_id, struct vhm_request *req)
* @pre vcpu != NULL && io_req != NULL * @pre vcpu != NULL && io_req != NULL
*/ */
int32_t int32_t
acrn_insert_request_wait(struct vcpu *vcpu, struct io_request *io_req) acrn_insert_request_wait(struct vcpu *vcpu, const struct io_request *io_req)
{ {
union vhm_request_buffer *req_buf = NULL; union vhm_request_buffer *req_buf = NULL;
struct vhm_request *vhm_req; struct vhm_request *vhm_req;

2
hypervisor/debug/dump.c
View File

@ -247,7 +247,7 @@ void asm_assert(int32_t line, const char *file, const char *txt)
} while (1); } while (1);
} }
void dump_intr_excp_frame(struct intr_excp_ctx *ctx) void dump_intr_excp_frame(const struct intr_excp_ctx *ctx)
{ {
const char *name = "Not defined"; const char *name = "Not defined";

2
hypervisor/debug/logmsg.c
View File

@ -43,7 +43,7 @@ static inline void free_earlylog_sbuf(uint16_t pcpu_id)
} }
static void do_copy_earlylog(struct shared_buf *dst_sbuf, static void do_copy_earlylog(struct shared_buf *dst_sbuf,
struct shared_buf *src_sbuf) const struct shared_buf *src_sbuf)
{ {
uint32_t buf_size, valid_size; uint32_t buf_size, valid_size;
uint32_t cur_tail; uint32_t cur_tail;

2
hypervisor/debug/sbuf.c
View File

@ -11,7 +11,7 @@
#include <hypervisor.h> #include <hypervisor.h>
static inline bool sbuf_is_empty(struct shared_buf *sbuf) static inline bool sbuf_is_empty(const struct shared_buf *sbuf)
{ {
return (sbuf->head == sbuf->tail); return (sbuf->head == sbuf->tail);
} }

2
hypervisor/debug/shell.c
View File

@ -329,7 +329,7 @@ static bool shell_input_line(void)
return done; return done;
} }
static int shell_process_cmd(char *p_input_line) static int shell_process_cmd(const char *p_input_line)
{ {
int status = -EINVAL; int status = -EINVAL;
struct shell_cmd *p_cmd; struct shell_cmd *p_cmd;

6
hypervisor/debug/vuart.c
View File

@ -80,7 +80,7 @@ static inline char fifo_getchar(struct fifo *fifo)
} }
} }
static inline uint32_t fifo_numchars(struct fifo *fifo) static inline uint32_t fifo_numchars(const struct fifo *fifo)
{ {
return fifo->num; return fifo->num;
} }
@ -107,7 +107,7 @@ static inline void vuart_fifo_init(struct acrn_vuart *vu)
* *
* Return an interrupt reason if one is available. * Return an interrupt reason if one is available.
*/ */
static uint8_t vuart_intr_reason(struct acrn_vuart *vu) static uint8_t vuart_intr_reason(const struct acrn_vuart *vu)
{ {
if (((vu->lsr & LSR_OE) != 0U) && ((vu->ier & IER_ELSI) != 0U)) { if (((vu->lsr & LSR_OE) != 0U) && ((vu->ier & IER_ELSI) != 0U)) {
return IIR_RLS; return IIR_RLS;
@ -125,7 +125,7 @@ static uint8_t vuart_intr_reason(struct acrn_vuart *vu)
* Toggle the COM port's intr pin depending on whether or not we have an * Toggle the COM port's intr pin depending on whether or not we have an
* interrupt condition to report to the processor. * interrupt condition to report to the processor.
*/ */
static void vuart_toggle_intr(struct acrn_vuart *vu) static void vuart_toggle_intr(const struct acrn_vuart *vu)
{ {
uint8_t intr_reason; uint8_t intr_reason;
union ioapic_rte rte; union ioapic_rte rte;

6
hypervisor/dm/vioapic.c
View File

@ -208,7 +208,7 @@ vioapic_update_tmr(struct vcpu *vcpu)
} }
static uint32_t static uint32_t
vioapic_indirect_read(struct acrn_vioapic *vioapic, uint32_t addr) vioapic_indirect_read(const struct acrn_vioapic *vioapic, uint32_t addr)
{ {
uint32_t regnum; uint32_t regnum;
uint32_t pin, pincount = vioapic_pincount(vioapic->vm); uint32_t pin, pincount = vioapic_pincount(vioapic->vm);
@ -248,7 +248,7 @@ vioapic_indirect_read(struct acrn_vioapic *vioapic, uint32_t addr)
return 0; return 0;
} }
static inline bool vioapic_need_intr(struct acrn_vioapic *vioapic, uint16_t pin) static inline bool vioapic_need_intr(const struct acrn_vioapic *vioapic, uint16_t pin)
{ {
uint32_t lvl; uint32_t lvl;
union ioapic_rte rte; union ioapic_rte rte;
@ -515,7 +515,7 @@ vioapic_init(struct vm *vm)
} }
void void
vioapic_cleanup(struct acrn_vioapic *vioapic) vioapic_cleanup(const struct acrn_vioapic *vioapic)
{ {
unregister_mmio_emulation_handler(vioapic->vm, unregister_mmio_emulation_handler(vioapic->vm,
(uint64_t)VIOAPIC_BASE, (uint64_t)VIOAPIC_BASE,

16
hypervisor/dm/vpic.c
View File

@ -37,7 +37,7 @@
static void vpic_set_pinstate(struct acrn_vpic *vpic, uint8_t pin, uint8_t level); static void vpic_set_pinstate(struct acrn_vpic *vpic, uint8_t pin, uint8_t level);
static inline bool master_pic(struct acrn_vpic *vpic, struct i8259_reg_state *i8259) static inline bool master_pic(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259)
{ {
if (i8259 == &vpic->i8259[0]) { if (i8259 == &vpic->i8259[0]) {
@ -47,7 +47,7 @@ static inline bool master_pic(struct acrn_vpic *vpic, struct i8259_reg_state *i8
} }
} }
static inline uint8_t vpic_get_highest_isrpin(struct i8259_reg_state *i8259) static inline uint8_t vpic_get_highest_isrpin(const struct i8259_reg_state *i8259)
{ {
uint8_t bit, pin, i; uint8_t bit, pin, i;
@ -74,7 +74,7 @@ static inline uint8_t vpic_get_highest_isrpin(struct i8259_reg_state *i8259)
return VPIC_INVALID_PIN; return VPIC_INVALID_PIN;
} }
static inline uint8_t vpic_get_highest_irrpin(struct i8259_reg_state *i8259) static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i8259)
{ {
uint8_t serviced, bit, pin, tmp; uint8_t serviced, bit, pin, tmp;
@ -207,7 +207,7 @@ static void vpic_notify_intr(struct acrn_vpic *vpic)
} }
} }
static int vpic_icw1(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val) static int vpic_icw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{ {
dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw1 0x%x\n", dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw1 0x%x\n",
vpic->vm, val); vpic->vm, val);
@ -237,7 +237,7 @@ static int vpic_icw1(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint
return 0; return 0;
} }
static int vpic_icw2(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val) static int vpic_icw2(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{ {
dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw2 0x%x\n", dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw2 0x%x\n",
vpic->vm, val); vpic->vm, val);
@ -249,7 +249,7 @@ static int vpic_icw2(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint
return 0; return 0;
} }
static int vpic_icw3(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val) static int vpic_icw3(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{ {
dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw3 0x%x\n", dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw3 0x%x\n",
vpic->vm, val); vpic->vm, val);
@ -259,7 +259,7 @@ static int vpic_icw3(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint
return 0; return 0;
} }
static int vpic_icw4(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val) static int vpic_icw4(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{ {
dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw4 0x%x\n", dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 icw4 0x%x\n",
vpic->vm, val); vpic->vm, val);
@ -290,7 +290,7 @@ static int vpic_icw4(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint
return 0; return 0;
} }
static int vpic_ocw1(struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val) static int vpic_ocw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
{ {
uint8_t pin, i, bit; uint8_t pin, i, bit;
uint8_t old = i8259->mask; uint8_t old = i8259->mask;

2
hypervisor/include/arch/x86/guest/vioapic.h
View File

@ -50,7 +50,7 @@ struct acrn_vioapic {
}; };
void vioapic_init(struct vm *vm); void vioapic_init(struct vm *vm);
void vioapic_cleanup(struct acrn_vioapic *vioapic); void vioapic_cleanup(const struct acrn_vioapic *vioapic);
void vioapic_reset(struct acrn_vioapic *vioapic); void vioapic_reset(struct acrn_vioapic *vioapic);
void vioapic_set_irq(struct vm *vm, uint32_t irq, uint32_t operation); void vioapic_set_irq(struct vm *vm, uint32_t irq, uint32_t operation);

12
hypervisor/include/arch/x86/guest/vlapic.h
View File

@ -101,7 +101,7 @@ struct acrn_vlapic {
/* APIC write handlers */ /* APIC write handlers */
void vlapic_set_cr8(struct acrn_vlapic *vlapic, uint64_t val); void vlapic_set_cr8(struct acrn_vlapic *vlapic, uint64_t val);
uint64_t vlapic_get_cr8(struct acrn_vlapic *vlapic); uint64_t vlapic_get_cr8(const struct acrn_vlapic *vlapic);
/* /*
* Returns 0 if there is no eligible vector that can be delivered to the * Returns 0 if there is no eligible vector that can be delivered to the
@ -113,7 +113,7 @@ uint64_t vlapic_get_cr8(struct acrn_vlapic *vlapic);
* Note that the vector does not automatically transition to the ISR as a * Note that the vector does not automatically transition to the ISR as a
* result of calling this function. * result of calling this function.
*/ */
int vlapic_pending_intr(struct acrn_vlapic *vlapic, uint32_t *vecptr); int vlapic_pending_intr(const struct acrn_vlapic *vlapic, uint32_t *vecptr);
/* /*
* Transition 'vector' from IRR to ISR. This function is called with the * Transition 'vector' from IRR to ISR. This function is called with the
@ -172,8 +172,8 @@ void vlapic_set_tmr_one_vec(struct acrn_vlapic *vlapic, uint32_t delmode,
uint32_t vector, bool level); uint32_t vector, bool level);
void vlapic_apicv_batch_set_tmr(struct acrn_vlapic *vlapic); void vlapic_apicv_batch_set_tmr(struct acrn_vlapic *vlapic);
uint32_t vlapic_get_id(struct acrn_vlapic *vlapic); uint32_t vlapic_get_id(const struct acrn_vlapic *vlapic);
uint8_t vlapic_get_apicid(struct acrn_vlapic *vlapic); uint8_t vlapic_get_apicid(const struct acrn_vlapic *vlapic);
int vlapic_create(struct vcpu *vcpu); int vlapic_create(struct vcpu *vcpu);
/* /*
* @pre vcpu != NULL * @pre vcpu != NULL
@ -181,8 +181,8 @@ int vlapic_create(struct vcpu *vcpu);
void vlapic_free(struct vcpu *vcpu); void vlapic_free(struct vcpu *vcpu);
void vlapic_init(struct acrn_vlapic *vlapic); void vlapic_init(struct acrn_vlapic *vlapic);
void vlapic_reset(struct acrn_vlapic *vlapic); void vlapic_reset(struct acrn_vlapic *vlapic);
void vlapic_restore(struct acrn_vlapic *vlapic, struct lapic_regs *regs); void vlapic_restore(struct acrn_vlapic *vlapic, const struct lapic_regs *regs);
bool vlapic_enabled(struct acrn_vlapic *vlapic); bool vlapic_enabled(const struct acrn_vlapic *vlapic);
uint64_t vlapic_apicv_get_apic_access_addr(void); uint64_t vlapic_apicv_get_apic_access_addr(void);
uint64_t vlapic_apicv_get_apic_page_addr(struct acrn_vlapic *vlapic); uint64_t vlapic_apicv_get_apic_page_addr(struct acrn_vlapic *vlapic);
void vlapic_apicv_inject_pir(struct acrn_vlapic *vlapic); void vlapic_apicv_inject_pir(struct acrn_vlapic *vlapic);

6
hypervisor/include/arch/x86/ioreq.h
View File

@ -112,7 +112,7 @@ void setup_io_bitmap(struct vm *vm);
void free_io_emulation_resource(struct vm *vm); void free_io_emulation_resource(struct vm *vm);
void allow_guest_pio_access(struct vm *vm, uint16_t port_address, void allow_guest_pio_access(struct vm *vm, uint16_t port_address,
uint32_t nbytes); uint32_t nbytes);
void register_io_emulation_handler(struct vm *vm, struct vm_io_range *range, void register_io_emulation_handler(struct vm *vm, const struct vm_io_range *range,
io_read_fn_t io_read_fn_ptr, io_read_fn_t io_read_fn_ptr,
io_write_fn_t io_write_fn_ptr); io_write_fn_t io_write_fn_ptr);
@ -121,7 +121,7 @@ int register_mmio_emulation_handler(struct vm *vm,
uint64_t end, void *handler_private_data); uint64_t end, void *handler_private_data);
void unregister_mmio_emulation_handler(struct vm *vm, uint64_t start, void unregister_mmio_emulation_handler(struct vm *vm, uint64_t start,
uint64_t end); uint64_t end);
void emulate_mmio_post(struct vcpu *vcpu, struct io_request *io_req); void emulate_mmio_post(struct vcpu *vcpu, const struct io_request *io_req);
void dm_emulate_mmio_post(struct vcpu *vcpu); void dm_emulate_mmio_post(struct vcpu *vcpu);
int32_t emulate_io(struct vcpu *vcpu, struct io_request *io_req); int32_t emulate_io(struct vcpu *vcpu, struct io_request *io_req);
@ -129,6 +129,6 @@ void emulate_io_post(struct vcpu *vcpu);
/* /*
* @pre vcpu != NULL && io_req != NULL * @pre vcpu != NULL && io_req != NULL
*/ */
int32_t acrn_insert_request_wait(struct vcpu *vcpu, struct io_request *io_req); int32_t acrn_insert_request_wait(struct vcpu *vcpu, const struct io_request *io_req);
#endif /* IOREQ_H */ #endif /* IOREQ_H */

2
hypervisor/include/arch/x86/irq.h
View File

@ -73,7 +73,7 @@ int quick_handler_nolock(struct irq_desc *desc, __unused void *handler_data);
void init_default_irqs(uint16_t cpu_id); void init_default_irqs(uint16_t cpu_id);
void dispatch_exception(struct intr_excp_ctx *ctx); void dispatch_exception(struct intr_excp_ctx *ctx);
void dispatch_interrupt(struct intr_excp_ctx *ctx); void dispatch_interrupt(const struct intr_excp_ctx *ctx);
#ifdef CONFIG_PARTITION_MODE #ifdef CONFIG_PARTITION_MODE
void partition_mode_dispatch_interrupt(struct intr_excp_ctx *ctx); void partition_mode_dispatch_interrupt(struct intr_excp_ctx *ctx);
#endif #endif

2
hypervisor/include/arch/x86/trusty.h
View File

@ -131,6 +131,6 @@ bool initialize_trusty(struct vcpu *vcpu, uint64_t param);
void destroy_secure_world(struct vm *vm, bool need_clr_mem); void destroy_secure_world(struct vm *vm, bool need_clr_mem);
void save_sworld_context(struct vcpu *vcpu); void save_sworld_context(struct vcpu *vcpu);
void restore_sworld_context(struct vcpu *vcpu); void restore_sworld_context(struct vcpu *vcpu);
void trusty_set_dseed(void *dseed, uint8_t dseed_num); void trusty_set_dseed(const void *dseed, uint8_t dseed_num);
#endif /* TRUSTY_H_ */ #endif /* TRUSTY_H_ */

6
hypervisor/include/arch/x86/vtd.h
View File

@ -468,11 +468,11 @@ extern struct dmar_info *get_dmar_info(void);
struct iommu_domain; struct iommu_domain;
/* Assign a device specified by bus & devfun to a iommu domain */ /* Assign a device specified by bus & devfun to a iommu domain */
int assign_iommu_device(struct iommu_domain *domain, int assign_iommu_device(const struct iommu_domain *domain,
uint8_t bus, uint8_t devfun); uint8_t bus, uint8_t devfun);
/* Unassign a device specified by bus & devfun to a iommu domain */ /* Unassign a device specified by bus & devfun to a iommu domain */
int unassign_iommu_device(struct iommu_domain *domain, int unassign_iommu_device(const struct iommu_domain *domain,
uint8_t bus, uint8_t devfun); uint8_t bus, uint8_t devfun);
/* Create a iommu domain for a VM specified by vm_id */ /* Create a iommu domain for a VM specified by vm_id */
@ -480,7 +480,7 @@ struct iommu_domain *create_iommu_domain(uint16_t vm_id,
uint64_t translation_table, uint32_t addr_width); uint64_t translation_table, uint32_t addr_width);
/* Destroy the iommu domain */ /* Destroy the iommu domain */
void destroy_iommu_domain(struct iommu_domain *domain); void destroy_iommu_domain(const struct iommu_domain *domain);
/* Enable translation of iommu*/ /* Enable translation of iommu*/
void enable_iommu(void); void enable_iommu(void);

2
hypervisor/include/common/hypercall.h
View File

@ -216,7 +216,7 @@ int32_t hcall_pulse_irqline(struct vm *vm, uint16_t vmid, uint64_t param);
* @return 0 on success, non-zero on error. * @return 0 on success, non-zero on error.
*/ */
int32_t hcall_set_irqline(const struct vm *vm, uint16_t vmid, int32_t hcall_set_irqline(const struct vm *vm, uint16_t vmid,
struct acrn_irqline_ops *ops); const struct acrn_irqline_ops *ops);
/** /**
* @brief inject MSI interrupt * @brief inject MSI interrupt
* *

4
hypervisor/include/debug/dump.h
View File

@ -13,11 +13,11 @@ struct intr_excp_ctx;
#define CALL_TRACE_HIERARCHY_MAX 20U #define CALL_TRACE_HIERARCHY_MAX 20U
#define DUMP_STACK_SIZE 0x200U #define DUMP_STACK_SIZE 0x200U
void dump_intr_excp_frame(struct intr_excp_ctx *ctx); void dump_intr_excp_frame(const struct intr_excp_ctx *ctx);
void dump_exception(struct intr_excp_ctx *ctx, uint16_t pcpu_id); void dump_exception(struct intr_excp_ctx *ctx, uint16_t pcpu_id);
#else #else
static inline void dump_intr_excp_frame(__unused struct intr_excp_ctx *ctx) static inline void dump_intr_excp_frame(__unused const struct intr_excp_ctx *ctx)
{ {
} }

8
hypervisor/include/lib/list.h
View File

@ -62,7 +62,7 @@ static inline void list_del_node(struct list_head *prev, struct list_head *next)
prev->next = next; prev->next = next;
} }
static inline void list_del(struct list_head *entry) static inline void list_del(const struct list_head *entry)
{ {
list_del_node(entry->prev, entry->next); list_del_node(entry->prev, entry->next);
} }
@ -73,12 +73,12 @@ static inline void list_del_init(struct list_head *entry)
INIT_LIST_HEAD(entry); INIT_LIST_HEAD(entry);
} }
static inline _Bool list_empty(struct list_head *head) static inline _Bool list_empty(const struct list_head *head)
{ {
return head->next == head; return head->next == head;
} }
static inline void list_splice_node(struct list_head *list, static inline void list_splice_node(const struct list_head *list,
struct list_head *head) struct list_head *head)
{ {
struct list_head *first = list->next; struct list_head *first = list->next;
@ -92,7 +92,7 @@ static inline void list_splice_node(struct list_head *list,
at->prev = last; at->prev = last;
} }
static inline void list_splice(struct list_head *list, struct list_head *head) static inline void list_splice(const struct list_head *list, struct list_head *head)
{ {
if (!list_empty(list)) { if (!list_empty(list)) {
list_splice_node(list, head); list_splice_node(list, head);

2
hypervisor/include/lib/mem_mgt.h
View File

@ -26,6 +26,6 @@ void *malloc(unsigned int num_bytes);
void *calloc(unsigned int num_elements, unsigned int element_size); void *calloc(unsigned int num_elements, unsigned int element_size);
void *alloc_page(void); void *alloc_page(void);
void *alloc_pages(unsigned int page_num); void *alloc_pages(unsigned int page_num);
void free(void *ptr); void free(const void *ptr);
#endif /* MEM_MGT_H */ #endif /* MEM_MGT_H */

4
hypervisor/lib/memory.c
View File

@ -187,7 +187,7 @@ static void *allocate_mem(struct mem_pool *pool, unsigned int num_bytes)
return (void *)NULL; return (void *)NULL;
} }
static void deallocate_mem(struct mem_pool *pool, void *ptr) static void deallocate_mem(struct mem_pool *pool, const void *ptr)
{ {
uint32_t *bitmask, *contiguity_bitmask; uint32_t *bitmask, *contiguity_bitmask;
uint32_t bmp_idx, bit_idx, buff_idx; uint32_t bmp_idx, bit_idx, buff_idx;
@ -297,7 +297,7 @@ void *calloc(unsigned int num_elements, unsigned int element_size)
return memory; return memory;
} }
void free(void *ptr) void free(const void *ptr)
{ {
/* Check if ptr belongs to 16-Bytes aligned Memory Pool */ /* Check if ptr belongs to 16-Bytes aligned Memory Pool */
if ((Memory_Pool.start_addr < ptr) && if ((Memory_Pool.start_addr < ptr) &&

2
hypervisor/lib/sprintf.c
View File

@ -382,7 +382,7 @@ static void print_decimal(struct print_param *param, int64_t value)
} }
static void print_string(struct print_param *param, const char *s) static void print_string(const struct print_param *param, const char *s)
{ {
/* the length of the string (-1) if unknown */ /* the length of the string (-1) if unknown */
uint32_t len; uint32_t len;