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HV: rename CONFIG_MAX_PCPU_NUM to MAX_PCPU_NUM

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rename the macro since MAX_PCPU_NUM could be parsed from board file and
it is not a configurable item anymore.

Tracked-On: #4230

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun 2019-12-11 12:29:21 +08:00 committed by wenlingz
parent 67b416d523
commit ea3476d22d
19 changed files with 28 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h
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@ -7,7 +7,7 @@
#ifndef MISC_CFG_H #ifndef MISC_CFG_H
#define MISC_CFG_H #define MISC_CFG_H
#define CONFIG_MAX_PCPU_NUM 4U #define MAX_PCPU_NUM 4U
#define MAX_PLATFORM_CLOS_NUM 0U #define MAX_PLATFORM_CLOS_NUM 0U
#define ROOTFS_0 "root=/dev/sda3 " #define ROOTFS_0 "root=/dev/sda3 "

2
hypervisor/arch/x86/configs/apl-up2/misc_cfg.h
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@ -7,7 +7,7 @@
#ifndef MISC_CFG_H #ifndef MISC_CFG_H
#define MISC_CFG_H #define MISC_CFG_H
#define CONFIG_MAX_PCPU_NUM 4U #define MAX_PCPU_NUM 4U
#define MAX_PLATFORM_CLOS_NUM 4U #define MAX_PLATFORM_CLOS_NUM 4U
#define ROOTFS_0 "root=/dev/sda3 " #define ROOTFS_0 "root=/dev/sda3 "

2
hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h
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@ -7,7 +7,7 @@
#ifndef MISC_CFG_H #ifndef MISC_CFG_H
#define MISC_CFG_H #define MISC_CFG_H
#define CONFIG_MAX_PCPU_NUM 8U #define MAX_PCPU_NUM 8U
#define MAX_PLATFORM_CLOS_NUM 0U #define MAX_PLATFORM_CLOS_NUM 0U
#define ROOTFS_0 "root=/dev/sda3 " #define ROOTFS_0 "root=/dev/sda3 "

2
hypervisor/arch/x86/configs/generic/misc_cfg.h
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@ -7,7 +7,7 @@
#ifndef MISC_CFG_H #ifndef MISC_CFG_H
#define MISC_CFG_H #define MISC_CFG_H
#define CONFIG_MAX_PCPU_NUM 4U #define MAX_PCPU_NUM 4U
#define MAX_PLATFORM_CLOS_NUM 0U #define MAX_PLATFORM_CLOS_NUM 0U
#define ROOTFS_0 "root=/dev/sda3 " #define ROOTFS_0 "root=/dev/sda3 "

2
hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h
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@ -7,7 +7,7 @@
#ifndef MISC_CFG_H #ifndef MISC_CFG_H
#define MISC_CFG_H #define MISC_CFG_H
#define CONFIG_MAX_PCPU_NUM 4U #define MAX_PCPU_NUM 4U
#define MAX_PLATFORM_CLOS_NUM 0U #define MAX_PLATFORM_CLOS_NUM 0U
#define ROOTFS_0 "root=/dev/sda3 " #define ROOTFS_0 "root=/dev/sda3 "

2
hypervisor/arch/x86/configs/nuc7i7dnb/misc_cfg.h
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@ -7,7 +7,7 @@
#ifndef MISC_CFG_H #ifndef MISC_CFG_H
#define MISC_CFG_H #define MISC_CFG_H
#define CONFIG_MAX_PCPU_NUM 4U #define MAX_PCPU_NUM 4U
#define MAX_PLATFORM_CLOS_NUM 0U #define MAX_PLATFORM_CLOS_NUM 0U
#define ROOTFS_0 "root=/dev/sda3 " #define ROOTFS_0 "root=/dev/sda3 "

2
hypervisor/arch/x86/configs/vacpi.c
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@ -53,7 +53,7 @@ static struct acpi_table_info acpi_table_template[CONFIG_MAX_VM_NUM] = {
.lint = 0x1U, .lint = 0x1U,
}, },
.lapic_array = { .lapic_array = {
[0U ... (CONFIG_MAX_PCPU_NUM - 1U)] = { [0U ... (MAX_PCPU_NUM - 1U)] = {
.header.type = ACPI_MADT_TYPE_LOCAL_APIC, .header.type = ACPI_MADT_TYPE_LOCAL_APIC,
.header.length = sizeof(struct acpi_madt_local_apic), .header.length = sizeof(struct acpi_madt_local_apic),
.lapic_flags = 0x1U, /* Processor Enabled=1, Runtime Online Capable=0 */ .lapic_flags = 0x1U, /* Processor Enabled=1, Runtime Online Capable=0 */

12
hypervisor/arch/x86/cpu.c
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@ -32,7 +32,7 @@
#define CPU_UP_TIMEOUT 100U /* millisecond */ #define CPU_UP_TIMEOUT 100U /* millisecond */
#define CPU_DOWN_TIMEOUT 100U /* millisecond */ #define CPU_DOWN_TIMEOUT 100U /* millisecond */
struct per_cpu_region per_cpu_data[CONFIG_MAX_PCPU_NUM] __aligned(PAGE_SIZE); struct per_cpu_region per_cpu_data[MAX_PCPU_NUM] __aligned(PAGE_SIZE);
static uint16_t phys_cpu_num = 0U; static uint16_t phys_cpu_num = 0U;
static uint64_t pcpu_sync = 0UL; static uint64_t pcpu_sync = 0UL;
static uint64_t startup_paddr = 0UL; static uint64_t startup_paddr = 0UL;
@ -47,18 +47,18 @@ static uint16_t get_pcpu_id_from_lapic_id(uint32_t lapic_id);
static uint64_t start_tsc __attribute__((__section__(".bss_noinit"))); static uint64_t start_tsc __attribute__((__section__(".bss_noinit")));
/** /**
* @pre phys_cpu_num <= CONFIG_MAX_PCPU_NUM * @pre phys_cpu_num <= MAX_PCPU_NUM
*/ */
static bool init_percpu_lapic_id(void) static bool init_percpu_lapic_id(void)
{ {
uint16_t i; uint16_t i;
uint32_t lapic_id_array[CONFIG_MAX_PCPU_NUM]; uint32_t lapic_id_array[MAX_PCPU_NUM];
bool success = false; bool success = false;
/* Save all lapic_id detected via parse_mdt in lapic_id_array */ /* Save all lapic_id detected via parse_mdt in lapic_id_array */
phys_cpu_num = parse_madt(lapic_id_array); phys_cpu_num = parse_madt(lapic_id_array);
if ((phys_cpu_num != 0U) && (phys_cpu_num <= CONFIG_MAX_PCPU_NUM)) { if ((phys_cpu_num != 0U) && (phys_cpu_num <= MAX_PCPU_NUM)) {
for (i = 0U; i < phys_cpu_num; i++) { for (i = 0U; i < phys_cpu_num; i++) {
per_cpu(lapic_id, i) = lapic_id_array[i]; per_cpu(lapic_id, i) = lapic_id_array[i];
} }
@ -82,7 +82,7 @@ static void pcpu_set_current_state(uint16_t pcpu_id, enum pcpu_boot_state state)
} }
/* /*
* @post return <= CONFIG_MAX_PCPU_NUM * @post return <= MAX_PCPU_NUM
*/ */
uint16_t get_pcpu_nums(void) uint16_t get_pcpu_nums(void)
{ {
@ -174,7 +174,7 @@ void init_pcpu_pre(bool is_bsp)
early_init_lapic(); early_init_lapic();
pcpu_id = get_pcpu_id_from_lapic_id(get_cur_lapic_id()); pcpu_id = get_pcpu_id_from_lapic_id(get_cur_lapic_id());
if (pcpu_id >= CONFIG_MAX_PCPU_NUM) { if (pcpu_id >= MAX_PCPU_NUM) {
panic("Invalid pCPU ID!"); panic("Invalid pCPU ID!");
} }
} }

2
hypervisor/arch/x86/guest/assign.c
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@ -67,7 +67,7 @@ static uint32_t calculate_logical_dest_mask(uint64_t pdmask)
uint16_t pcpu_id; uint16_t pcpu_id;
pcpu_id = ffs64(pcpu_mask); pcpu_id = ffs64(pcpu_mask);
while (pcpu_id < CONFIG_MAX_PCPU_NUM) { while (pcpu_id < MAX_PCPU_NUM) {
bitmap_clear_nolock(pcpu_id, &pcpu_mask); bitmap_clear_nolock(pcpu_id, &pcpu_mask);
dest_mask |= per_cpu(lapic_ldr, pcpu_id); dest_mask |= per_cpu(lapic_ldr, pcpu_id);
pcpu_id = ffs64(pcpu_mask); pcpu_id = ffs64(pcpu_mask);

4
hypervisor/arch/x86/lapic.c
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@ -240,7 +240,7 @@ void send_dest_ipi_mask(uint32_t dest_mask, uint32_t vector)
pcpu_id = ffs64(mask); pcpu_id = ffs64(mask);
while (pcpu_id < CONFIG_MAX_PCPU_NUM) { while (pcpu_id < MAX_PCPU_NUM) {
bitmap32_clear_nolock(pcpu_id, &mask); bitmap32_clear_nolock(pcpu_id, &mask);
if (is_pcpu_active(pcpu_id)) { if (is_pcpu_active(pcpu_id)) {
icr.value_32.hi_32 = per_cpu(lapic_id, pcpu_id); icr.value_32.hi_32 = per_cpu(lapic_id, pcpu_id);
@ -270,7 +270,7 @@ void send_single_ipi(uint16_t pcpu_id, uint32_t vector)
} }
/** /**
* @pre pcpu_id < CONFIG_MAX_PCPU_NUM * @pre pcpu_id < MAX_PCPU_NUM
* *
* @return None * @return None
*/ */

2
hypervisor/arch/x86/notify.c
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@ -44,7 +44,7 @@ void smp_call_function(uint64_t mask, smp_call_func_t func, void *data)
/* wait for previous smp call complete, which may run on other cpus */ /* wait for previous smp call complete, which may run on other cpus */
while (atomic_cmpxchg64(&smp_call_mask, 0UL, mask & INVALID_BIT_INDEX) != 0UL); while (atomic_cmpxchg64(&smp_call_mask, 0UL, mask & INVALID_BIT_INDEX) != 0UL);
pcpu_id = ffs64(mask); pcpu_id = ffs64(mask);
while (pcpu_id < CONFIG_MAX_PCPU_NUM) { while (pcpu_id < MAX_PCPU_NUM) {
bitmap_clear_nolock(pcpu_id, &mask); bitmap_clear_nolock(pcpu_id, &mask);
if (is_pcpu_active(pcpu_id)) { if (is_pcpu_active(pcpu_id)) {
smp_call = &per_cpu(smp_call_info, pcpu_id); smp_call = &per_cpu(smp_call_info, pcpu_id);

6
hypervisor/boot/acpi_base.c
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@ -159,7 +159,7 @@ void *get_acpi_tbl(const char *signature)
* of Type 0 * of Type 0
*/ */
static uint16_t static uint16_t
local_parse_madt(struct acpi_table_madt *madt, uint32_t lapic_id_array[CONFIG_MAX_PCPU_NUM]) local_parse_madt(struct acpi_table_madt *madt, uint32_t lapic_id_array[MAX_PCPU_NUM])
{ {
uint16_t pcpu_num = 0U; uint16_t pcpu_num = 0U;
struct acpi_madt_local_apic *processor; struct acpi_madt_local_apic *processor;
@ -181,7 +181,7 @@ local_parse_madt(struct acpi_table_madt *madt, uint32_t lapic_id_array[CONFIG_MA
if (entry->type == ACPI_MADT_TYPE_LOCAL_APIC) { if (entry->type == ACPI_MADT_TYPE_LOCAL_APIC) {
processor = (struct acpi_madt_local_apic *)iterator; processor = (struct acpi_madt_local_apic *)iterator;
if ((processor->lapic_flags & ACPI_MADT_ENABLED) != 0U) { if ((processor->lapic_flags & ACPI_MADT_ENABLED) != 0U) {
if (pcpu_num < CONFIG_MAX_PCPU_NUM) { if (pcpu_num < MAX_PCPU_NUM) {
lapic_id_array[pcpu_num] = processor->id; lapic_id_array[pcpu_num] = processor->id;
} }
pcpu_num++; pcpu_num++;
@ -227,7 +227,7 @@ ioapic_parse_madt(void *madt, struct ioapic_info *ioapic_id_array)
} }
/* The lapic_id info gotten from madt will be returned in lapic_id_array */ /* The lapic_id info gotten from madt will be returned in lapic_id_array */
uint16_t parse_madt(uint32_t lapic_id_array[CONFIG_MAX_PCPU_NUM]) uint16_t parse_madt(uint32_t lapic_id_array[MAX_PCPU_NUM])
{ {
uint16_t ret = 0U; uint16_t ret = 0U;
struct acpi_table_rsdp *rsdp = NULL; struct acpi_table_rsdp *rsdp = NULL;

2
hypervisor/boot/include/acpi.h
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@ -202,7 +202,7 @@ struct acpi_dmar_device_scope {
void *get_acpi_tbl(const char *signature); void *get_acpi_tbl(const char *signature);
struct ioapic_info; struct ioapic_info;
uint16_t parse_madt(uint32_t lapic_id_array[CONFIG_MAX_PCPU_NUM]); uint16_t parse_madt(uint32_t lapic_id_array[MAX_PCPU_NUM]);
uint16_t parse_madt_ioapic(struct ioapic_info *ioapic_id_array); uint16_t parse_madt_ioapic(struct ioapic_info *ioapic_id_array);
#ifdef CONFIG_ACPI_PARSE_ENABLED #ifdef CONFIG_ACPI_PARSE_ENABLED

4
hypervisor/debug/profiling.c
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@ -812,7 +812,7 @@ static void profiling_stop_pmu(void)
int32_t profiling_msr_ops_all_cpus(struct acrn_vm *vm, uint64_t addr) int32_t profiling_msr_ops_all_cpus(struct acrn_vm *vm, uint64_t addr)
{ {
uint16_t i; uint16_t i;
struct profiling_msr_ops_list msr_list[CONFIG_MAX_PCPU_NUM]; struct profiling_msr_ops_list msr_list[MAX_PCPU_NUM];
uint16_t pcpu_nums = get_pcpu_nums(); uint16_t pcpu_nums = get_pcpu_nums();
dev_dbg(ACRN_DBG_PROFILING, "%s: entering", __func__); dev_dbg(ACRN_DBG_PROFILING, "%s: entering", __func__);
@ -1256,7 +1256,7 @@ int32_t profiling_get_pcpu_id(struct acrn_vm *vm, uint64_t addr)
int32_t profiling_get_status_info(struct acrn_vm *vm, uint64_t gpa) int32_t profiling_get_status_info(struct acrn_vm *vm, uint64_t gpa)
{ {
uint16_t i; uint16_t i;
struct profiling_status pstats[CONFIG_MAX_PCPU_NUM]; struct profiling_status pstats[MAX_PCPU_NUM];
uint16_t pcpu_nums = get_pcpu_nums(); uint16_t pcpu_nums = get_pcpu_nums();
dev_dbg(ACRN_DBG_PROFILING, "%s: entering", __func__); dev_dbg(ACRN_DBG_PROFILING, "%s: entering", __func__);

2
hypervisor/debug/shell.c
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@ -26,7 +26,7 @@
#define MAX_STR_SIZE 256U #define MAX_STR_SIZE 256U
#define SHELL_PROMPT_STR "ACRN:\\>" #define SHELL_PROMPT_STR "ACRN:\\>"
#define SHELL_LOG_BUF_SIZE (PAGE_SIZE * CONFIG_MAX_PCPU_NUM / 2U) #define SHELL_LOG_BUF_SIZE (PAGE_SIZE * MAX_PCPU_NUM / 2U)
static char shell_log_buf[SHELL_LOG_BUF_SIZE]; static char shell_log_buf[SHELL_LOG_BUF_SIZE];
/* Input Line Other - Switch to the "other" input line (there are only two /* Input Line Other - Switch to the "other" input line (there are only two

2
hypervisor/include/arch/x86/cpu.h
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@ -658,7 +658,7 @@ static inline void clac(void)
} }
/* /*
* @post return <= CONFIG_MAX_PCPU_NUM * @post return <= MAX_PCPU_NUM
*/ */
uint16_t get_pcpu_nums(void); uint16_t get_pcpu_nums(void);
bool is_pcpu_active(uint16_t pcpu_id); bool is_pcpu_active(uint16_t pcpu_id);

2
hypervisor/include/arch/x86/per_cpu.h
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@ -60,7 +60,7 @@ struct per_cpu_region {
uint64_t tsc_suspend; uint64_t tsc_suspend;
} __aligned(PAGE_SIZE); /* per_cpu_region size aligned with PAGE_SIZE */ } __aligned(PAGE_SIZE); /* per_cpu_region size aligned with PAGE_SIZE */
extern struct per_cpu_region per_cpu_data[CONFIG_MAX_PCPU_NUM]; extern struct per_cpu_region per_cpu_data[MAX_PCPU_NUM];
/* /*
* get percpu data for pcpu_id. * get percpu data for pcpu_id.
*/ */

2
hypervisor/include/dm/vacpi.h
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@ -54,7 +54,7 @@ struct acpi_table_info {
struct { struct {
struct acpi_table_madt madt; struct acpi_table_madt madt;
struct acpi_madt_local_apic_nmi lapic_nmi; struct acpi_madt_local_apic_nmi lapic_nmi;
struct acpi_madt_local_apic lapic_array[CONFIG_MAX_PCPU_NUM]; struct acpi_madt_local_apic lapic_array[MAX_PCPU_NUM];
} __packed; } __packed;
}; };

2
hypervisor/scenarios/sdc/vm_configurations.c
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@ -46,7 +46,7 @@ struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
.uuid = {0xd2U, 0x79U, 0x54U, 0x38U, 0x25U, 0xd6U, 0x11U, 0xe8U, \ .uuid = {0xd2U, 0x79U, 0x54U, 0x38U, 0x25U, 0xd6U, 0x11U, 0xe8U, \
0x86U, 0x4eU, 0xcbU, 0x7aU, 0x18U, 0xb3U, 0x46U, 0x43U}, 0x86U, 0x4eU, 0xcbU, 0x7aU, 0x18U, 0xb3U, 0x46U, 0x43U},
/* d2795438-25d6-11e8-864e-cb7a18b34643 */ /* d2795438-25d6-11e8-864e-cb7a18b34643 */
.vcpu_num = CONFIG_MAX_PCPU_NUM - CONFIG_MAX_KATA_VM_NUM - 1U, .vcpu_num = MAX_PCPU_NUM - CONFIG_MAX_KATA_VM_NUM - 1U,
.vcpu_affinity = VM1_CONFIG_VCPU_AFFINITY, .vcpu_affinity = VM1_CONFIG_VCPU_AFFINITY,
.vuart[0] = { .vuart[0] = {
.type = VUART_LEGACY_PIO, .type = VUART_LEGACY_PIO,