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HV: add rdmsr/wrmsr debug cmd

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Add these commands to  HV console:
1.rdmsr [-p<pcpu_id>] [msr_index]
  read MSR register, eg., 'rdmsr 0xc8f' read MSR with address 0xc8f;
  'rdmsr -p1 0xc8f' read MSR address 0xc8f, on PCPU1.

1.wrmsr [-p<pcpu_id>] [msr_index] [value]
  write to MSR register, eg., 'wrmsr 0xc8f 0x100000000' write
  0x100000000 to MSR, which address is 0xc8f;
  'wrmsr -p1 0xc8f 0x100000000' write 0x100000000 to MSR address
  0xc8f, on PCPU1.

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
yuhong.tao@intel.com 2019-01-21 11:53:22 +00:00 committed by wenlingz
parent 648450c62c
commit eb7091bb1f
2 changed files with 95 additions and 0 deletions
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87
hypervisor/debug/shell.c
View File

@ -33,6 +33,8 @@ static int32_t shell_show_ioapic_info(__unused int32_t argc, __unused char **arg
static int32_t shell_loglevel(int32_t argc, char **argv);
static int32_t shell_cpuid(int32_t argc, char **argv);
static int32_t shell_trigger_crash(int32_t argc, char **argv);
static int32_t shell_rdmsr(int32_t argc, char **argv);
static int32_t shell_wrmsr(int32_t argc, char **argv);
static struct shell_cmd shell_cmds[] = {
{
@ -113,6 +115,18 @@ static struct shell_cmd shell_cmds[] = {
.help_str = SHELL_CMD_REBOOT_HELP,
.fcn = shell_trigger_crash,
},
{
.str = SHELL_CMD_RDMSR,
.cmd_param = SHELL_CMD_RDMSR_PARAM,
.help_str = SHELL_CMD_RDMSR_HELP,
.fcn = shell_rdmsr,
},
{
.str = SHELL_CMD_WRMSR,
.cmd_param = SHELL_CMD_WRMSR_PARAM,
.help_str = SHELL_CMD_WRMSR_HELP,
.fcn = shell_wrmsr,
},
};
/* The initial log level*/
@ -1233,3 +1247,76 @@ static int32_t shell_trigger_crash(int32_t argc, char **argv)
return 0;
}
static int32_t shell_rdmsr(int32_t argc, char **argv)
{
uint16_t pcpu_id = 0;
int32_t ret = 0;
uint32_t msr_index = 0;
uint64_t val = 0;
char str[MAX_STR_SIZE] = {0};
pcpu_id = get_cpu_id();
switch (argc) {
case 3:
/* rdrmsr -p<PCPU_ID> <MSR_INDEX>*/
if ((argv[1][0] == '-') && (argv[1][1] == 'p')) {
pcpu_id = (uint16_t)strtol_deci(&(argv[1][2]));
msr_index = (uint32_t)strtoul_hex(argv[2]);
} else {
ret = -EINVAL;
}
break;
case 2:
/* rdmsr <MSR_INDEX> */
msr_index = (uint32_t)strtoul_hex(argv[1]);
break;
default:
ret = -EINVAL;
}
if (ret == 0) {
val = msr_read_pcpu(msr_index, pcpu_id);
snprintf(str, MAX_STR_SIZE, "rdmsr(0x%x):0x%llx\n", msr_index, val);
shell_puts(str);
}
return ret;
}
static int32_t shell_wrmsr(int32_t argc, char **argv)
{
uint16_t pcpu_id = 0;
int32_t ret = 0;
uint32_t msr_index = 0;
uint64_t val = 0;
pcpu_id = get_cpu_id();
switch (argc) {
case 4:
/* wrmsr -p<PCPU_ID> <MSR_INDEX> <VALUE>*/
if ((argv[1][0] == '-') && (argv[1][1] == 'p')) {
pcpu_id = (uint16_t)strtol_deci(&(argv[1][2]));
msr_index = (uint32_t)strtoul_hex(argv[2]);
val = strtoul_hex(argv[3]);
} else {
ret = -EINVAL;
}
break;
case 3:
/* wrmsr <MSR_INDEX> <VALUE>*/
msr_index = (uint32_t)strtoul_hex(argv[1]);
val = strtoul_hex(argv[2]);
break;
default:
ret = -EINVAL;
}
if (ret == 0) {
msr_write_pcpu(msr_index, val, pcpu_id);
}
return ret;
}

8
hypervisor/debug/shell_priv.h
View File

@ -86,4 +86,12 @@ struct shell {
#define SHELL_CMD_CPUID "cpuid"
#define SHELL_CMD_CPUID_PARAM "<leaf> [subleaf]"
#define SHELL_CMD_CPUID_HELP "cpuid leaf [subleaf], in hexadecimal"
#define SHELL_CMD_RDMSR "rdmsr"
#define SHELL_CMD_RDMSR_PARAM "[-p<pcpu_id>] <msr_index>"
#define SHELL_CMD_RDMSR_HELP "rdmsr -p<pcpu_id> <msr_index>, msr_index in hexadecimal"
#define SHELL_CMD_WRMSR "wrmsr"
#define SHELL_CMD_WRMSR_PARAM "[-p<pcpu_id>] <msr_index> <value>"
#define SHELL_CMD_WRMSR_HELP "wrmsr -p<pcpu_id> <msr_index> <value>, msr_index and value in hexadecimal"
#endif /* SHELL_PRIV_H */