hv: refine the left atomic operation

rename atomic_cmpxchg_int to atomic_cmpxchg
replace atomic_cmpset_long with atomic_cmpxchg64
rename atomic_readandclear_long to atomic_readandclear64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>

hypervisor/arch/x86/guest/vlapic.c

@@ -1992,7 +1992,7 @@ apicv_set_intr_ready(struct vlapic *vlapic, int vector, __unused bool level)
 	mask = 1UL << (vector % 64);
 
 	atomic_set_long(&pir_desc->pir[idx], mask);
-	notify = atomic_cmpset_long(&pir_desc->pending, 0, 1);
+	notify = (atomic_cmpxchg64((long *)&pir_desc->pending, 0, 1) == 0);
 	return notify;
 }
 
@@ -2109,7 +2109,7 @@ apicv_inject_pir(struct vlapic *vlapic)
 	struct lapic_reg *irr = NULL;
 
 	pir_desc = vlapic->pir_desc;
-	if (atomic_cmpset_long(&pir_desc->pending, 1, 0) == 0)
+	if (atomic_cmpxchg64((long *)&pir_desc->pending, 1, 0) != 1)
 		return;
 
 	pirval = 0;
@@ -2118,7 +2118,7 @@ apicv_inject_pir(struct vlapic *vlapic)
 	irr = &lapic->irr[0];
 
 	for (i = 0; i < 4; i++) {
-		val = atomic_readandclear_long(&pir_desc->pir[i]);
+		val = atomic_readandclear64((long *)&pir_desc->pir[i]);
 		if (val != 0) {
 			irr[i * 2].val |= val;
 			irr[(i * 2) + 1].val |= val >> 32;

hypervisor/debug/uart16550.c

@@ -179,7 +179,7 @@ static int uart16550_open(struct tgt_uart *tgt_uart,
 	int status = 0;
 
 	if (strcmp(tgt_uart->uart_id, "STDIO") == 0) {
-		if (atomic_cmpxchg_int(&tgt_uart->open_count, 0, 1) != 0)
+		if (atomic_cmpxchg(&tgt_uart->open_count, 0, 1) != 0)
 			return -EBUSY;
 
 		/* Call UART setup function */
@@ -264,7 +264,7 @@ static int uart16550_get_rx_err(uint32_t rx_data)
 static void uart16550_close(struct tgt_uart *tgt_uart)
 {
 	if (tgt_uart != NULL) {
-		if (atomic_cmpxchg_int(&tgt_uart->open_count, 1, 0) == 1) {
+		if (atomic_cmpxchg(&tgt_uart->open_count, 1, 0) == 1) {
 			/* TODO: Add logic to disable the UART */
 		}
 	}

hypervisor/include/lib/atomic.h

@@ -56,6 +56,26 @@ static inline void name(volatile type *ptr, type v)	\
 build_atomic_store(atomic_store, "l", int, p, v)
 build_atomic_store(atomic_store64, "q", long, p, v)
 
+#define build_atomic_inc(name, size, type, ptr)		\
+static inline void name(type *ptr)			\
+{							\
+	asm volatile(BUS_LOCK "inc" size " %0"		\
+			: "=m" (*ptr)			\
+			:  "m" (*ptr));			\
+}
+build_atomic_inc(atomic_inc, "l", int, p)
+build_atomic_inc(atomic_inc64, "q", long, p)
+
+#define build_atomic_dec(name, size, type, ptr)		\
+static inline void name(type *ptr)			\
+{							\
+	asm volatile(BUS_LOCK "dec" size " %0"		\
+			: "=m" (*ptr)			\
+			:  "m" (*ptr));			\
+}
+build_atomic_dec(atomic_dec, "l", int, p)
+build_atomic_dec(atomic_dec64, "q", long, p)
+
 /*
  *  #define atomic_set_int(P, V)		(*(unsigned int *)(P) |= (V))
  */
@@ -78,46 +98,6 @@ static inline void atomic_clear_int(unsigned int *p, unsigned int v)
 			:  "cc", "memory");
 }
 
-#define build_atomic_inc(name, size, type, ptr)		\
-static inline void name(type *ptr)			\
-{							\
-	asm volatile(BUS_LOCK "inc" size " %0"		\
-			: "=m" (*ptr)			\
-			:  "m" (*ptr));			\
-}
-build_atomic_inc(atomic_inc, "l", int, p)
-build_atomic_inc(atomic_inc64, "q", long, p)
-
-#define build_atomic_dec(name, size, type, ptr)		\
-static inline void name(type *ptr)			\
-{							\
-	asm volatile(BUS_LOCK "dec" size " %0"		\
-			: "=m" (*ptr)			\
-			:  "m" (*ptr));			\
-}
-build_atomic_dec(atomic_dec, "l", int, p)
-build_atomic_dec(atomic_dec64, "q", long, p)
-
-
-/*
- *  #define atomic_swap_int(P, V) \
- *  (return (*(unsigned int *)(P)); *(unsigned int *)(P) = (V);)
- */
-static inline int atomic_swap_int(unsigned int *p, unsigned int v)
-{
-	__asm __volatile(BUS_LOCK "xchgl %1,%0"
-			:  "+m" (*p), "+r" (v)
-			:
-			:  "cc", "memory");
-	return v;
-}
-
-/*
- *  #define atomic_readandclear_int(P) \
- *  (return (*(unsigned int *)(P)); *(unsigned int *)(P) = 0;)
- */
-#define	atomic_readandclear_int(p)	atomic_swap_int(p, 0)
-
 /*
  *  #define atomic_set_long(P, V)		(*(unsigned long *)(P) |= (V))
  */
@@ -140,37 +120,43 @@ static inline void atomic_clear_long(unsigned long *p, unsigned long v)
 			:  "cc", "memory");
 }
 
-/*
+#define build_atomic_swap(name, size, type, ptr, v)	\
- *  #define atomic_swap_long(P, V) \
+static inline type name(type *ptr, type v)		\
- *  (return (*(unsigned long *)(P)); *(unsigned long *)(P) = (V);)
+{							\
- */
+	asm volatile(BUS_LOCK "xchg" size " %1,%0"	\
-static inline long atomic_swap_long(unsigned long *p, unsigned long v)
+			:  "+m" (*ptr), "+r" (v)	\
-{
+			:				\
-	__asm __volatile(BUS_LOCK "xchgq %1,%0"
+			:  "cc", "memory");		\
-			:  "+m" (*p), "+r" (v)
+	return v;					\
-			:
-			:  "cc", "memory");
-	return v;
 }
+build_atomic_swap(atomic_swap, "l", int, p, v)
+build_atomic_swap(atomic_swap64, "q", long, p, v)
 
-/*
+ /*
- *  #define atomic_readandclear_long(P) \
+ * #define atomic_readandclear(P) \
- *  (return (*(unsigned long *)(P)); *(unsigned long *)(P) = 0;)
+ * (return (*(int *)(P)); *(int *)(P) = 0;)
- */
+  */
-#define	atomic_readandclear_long(p)	atomic_swap_long(p, 0)
+#define atomic_readandclear(p)		atomic_swap(p, 0)
 
-static inline int atomic_cmpxchg_int(unsigned int *p,
+ /*
-			int old, int new)
+ * #define atomic_readandclear64(P) \
-{
+ * (return (*(long *)(P)); *(long *)(P) = 0;)
-	int ret;
+  */
+#define atomic_readandclear64(p)	atomic_swap64(p, 0)
 
-	__asm __volatile(BUS_LOCK "cmpxchgl %2,%1"
+#define build_atomic_cmpxchg(name, size, type, ptr, old, new)	\
-			: "=a" (ret), "+m" (*p)
+static inline type name(volatile type *ptr,			\
-			: "r" (new), "0" (old)
+			type old, type new)			\
-			: "memory");
+{								\
-
+	type ret;						\
-	return ret;
+	asm volatile(BUS_LOCK "cmpxchg" size " %2,%1"		\
+			: "=a" (ret), "+m" (*p)			\
+			: "r" (new), "0" (old)			\
+			: "memory");				\
+	return ret;						\
 }
+build_atomic_cmpxchg(atomic_cmpxchg, "l", int, p, old, new)
+build_atomic_cmpxchg(atomic_cmpxchg64, "q", long, p, old, new)
 
 #define build_atomic_xadd(name, size, type, ptr, v)		\
 static inline type name(type *ptr, type v)			\
@@ -196,17 +182,4 @@ build_atomic_xadd(atomic_xadd64, "q", long, p, v)
 #define atomic_inc64_return(v)		atomic_add64_return((v), 1)
 #define atomic_dec64_return(v)		atomic_sub64_return((v), 1)
 
-static inline int
-atomic_cmpset_long(unsigned long *dst, unsigned long expect, unsigned long src)
-{
-	unsigned char res;
-
-	__asm __volatile(BUS_LOCK "cmpxchg %3,%1\n\tsete %0"
-			: "=q" (res), "+m" (*dst), "+a" (expect)
-			: "r" (src)
-			: "memory", "cc");
-
-	return res;
-}
-
 #endif /* ATOMIC_H*/