From f1f6fe11c128cd56e20983b67d3616ba089ffcd5 Mon Sep 17 00:00:00 2001
From: "Zhou, Wu" <wu.zhou@intel.com>
Date: Fri, 3 Sep 2021 15:48:25 +0800
Subject: [PATCH] HV: move the ve820 GPU OpRegion address

The ve820 table' hpa1_low area is divided into two parts, which
is making the code too complicated and causing problems. Moving
the entries that divides the hpa1_low could make things easier.

This patch moves the GPU OpRegion to the tail area of 2G,
consecutive to the acpi data/nvs area.

before:
|<---low_1M--->|
|<---hpa1_low_part1--->|
|<---SSRAM--->|
|<---GPU_OpRegion--->|
|<---hpa1_low_part2--->|
|<---ACPI DATA--->|
|<---ACPI NVS--->|
---2G---

after:
|<---low_1M--->|
|<---hpa1_low_part1--->|
|<---SSRAM--->|
|<---hpa1_low_part2--->|
|<---GPU_OpRegion--->|
|<---ACPI DATA--->|
|<---ACPI NVS--->|
---2G---

Tracked-On: #6674

Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
---
 hypervisor/arch/x86/guest/ve820.c | 12 ++++++------
 hypervisor/include/common/ptdev.h |  3 ++-
 hypervisor/include/dm/vacpi.h     |  1 +
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/hypervisor/arch/x86/guest/ve820.c b/hypervisor/arch/x86/guest/ve820.c
index b300f9b63..5fd906294 100644
--- a/hypervisor/arch/x86/guest/ve820.c
+++ b/hypervisor/arch/x86/guest/ve820.c
@@ -15,7 +15,7 @@
 #include <ptdev.h>
 
 #define ENTRY_HPA1_LOW_PART1	2U
-#define ENTRY_HPA1_LOW_PART2	5U
+#define ENTRY_HPA1_LOW_PART2	4U
 #define ENTRY_HPA1_HI		9U
 
 static struct e820_entry service_vm_e820[E820_MAX_ENTRIES];
@@ -199,16 +199,16 @@ static const struct e820_entry pre_ve820_template[E820_MAX_ENTRIES] = {
 		.length   = PRE_RTVM_SW_SRAM_MAX_SIZE,
 		.type     = E820_TYPE_RESERVED
 	},
+	{	/* part2 of lowmem of hpa1*/
+		.baseaddr = PRE_RTVM_SW_SRAM_BASE_GPA + PRE_RTVM_SW_SRAM_MAX_SIZE,
+		.length   = GPU_OPREGION_GPA - (PRE_RTVM_SW_SRAM_BASE_GPA + PRE_RTVM_SW_SRAM_MAX_SIZE),
+		.type     = E820_TYPE_RAM
+	},
 	{	/* GPU OpRegion for pre-launched VM */
 		.baseaddr = GPU_OPREGION_GPA,
 		.length   = GPU_OPREGION_SIZE,
 		.type     = E820_TYPE_RESERVED
 	},
-	{	/* part2 of lowmem of hpa1*/
-		.baseaddr = GPU_OPREGION_GPA + GPU_OPREGION_SIZE,
-		.length   = VIRT_ACPI_DATA_ADDR - (GPU_OPREGION_GPA + GPU_OPREGION_SIZE),
-		.type     = E820_TYPE_RAM
-	},
 	{	/* ACPI Reclaim */
 		.baseaddr = VIRT_ACPI_DATA_ADDR,/* consecutive from 0x7fe00000UL */
 		.length   = VIRT_ACPI_DATA_LEN,
diff --git a/hypervisor/include/common/ptdev.h b/hypervisor/include/common/ptdev.h
index f586e20bd..9ebc83d7a 100644
--- a/hypervisor/include/common/ptdev.h
+++ b/hypervisor/include/common/ptdev.h
@@ -9,6 +9,7 @@
 #include <list.h>
 #include <asm/lib/spinlock.h>
 #include <timer.h>
+#include <vacpi.h>
 
 
 enum intx_ctlr {
@@ -20,7 +21,7 @@ enum intx_ctlr {
 #define PTDEV_INTR_INTX		(1U << 1U)
 
 #define GPU_OPREGION_SIZE	0x5000U
-#define GPU_OPREGION_GPA	0x40880000U
+#define GPU_OPREGION_GPA	(VIRT_ACPI_DATA_ADDR  - GPU_OPREGION_SIZE)
 #define PCIR_ASLS_CTL		0xfcU /* register offset in PCIe configuration space for Opregion base address */
 #define PCIM_ASLS_OPREGION_MASK	0xfffff000U /* opregion need 4KB aligned */
 
diff --git a/hypervisor/include/dm/vacpi.h b/hypervisor/include/dm/vacpi.h
index 0266b82a7..87424d805 100644
--- a/hypervisor/include/dm/vacpi.h
+++ b/hypervisor/include/dm/vacpi.h
@@ -8,6 +8,7 @@
 #define VACPI_H
 
 #include <acpi.h>
+#include <asm/guest/vm.h>
 
 #define ACPI_OEM_ID           "ACRN  "