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https://github.com/projectacrn/acrn-hypervisor.git
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hv/mod_irq: hide arch specific data in irq_desc
Arch specific IRQ data is now an opaque pointer in irq_desc. This is a preparation step for spliting IRQ handling into common and architecture specific parts. Tracked-On: #5825 Signed-off-by: Peter Fang <peter.fang@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
This commit is contained in:
Liang Yi
wenlingz
parent
a7e53dd32f
commit
f3cae9e258
@ -23,6 +23,8 @@ static spinlock_t irq_alloc_spinlock = { .head = 0U, .tail = 0U, };
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uint64_t irq_alloc_bitmap[IRQ_ALLOC_BITMAP_SIZE];
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struct irq_desc irq_desc_array[NR_IRQS];
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static struct x86_irq_data irq_data[NR_IRQS];
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static uint32_t vector_to_irq[NR_MAX_VECTOR + 1];
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spurious_handler_t spurious_handler;
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@ -100,20 +102,20 @@ static void free_irq_num(uint32_t irq)
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uint32_t alloc_irq_vector(uint32_t irq)
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{
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uint32_t vr;
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struct irq_desc *desc;
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struct x86_irq_data *irqd;
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uint64_t rflags;
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uint32_t ret;
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if (irq < NR_IRQS) {
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desc = &irq_desc_array[irq];
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irqd = &irq_data[irq];
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if (desc->vector != VECTOR_INVALID) {
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if (vector_to_irq[desc->vector] == irq) {
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if (irqd->vector != VECTOR_INVALID) {
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if (vector_to_irq[irqd->vector] == irq) {
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/* statically binded */
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vr = desc->vector;
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vr = irqd->vector;
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} else {
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pr_err("[%s] irq[%u]:vector[%u] mismatch",
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__func__, irq, desc->vector);
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__func__, irq, irqd->vector);
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vr = VECTOR_INVALID;
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}
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} else {
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@ -125,7 +127,7 @@ uint32_t alloc_irq_vector(uint32_t irq)
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for (vr = VECTOR_DYNAMIC_START;
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vr <= VECTOR_DYNAMIC_END; vr++) {
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if (vector_to_irq[vr] == IRQ_INVALID) {
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desc->vector = vr;
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irqd->vector = vr;
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vector_to_irq[vr] = irq;
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break;
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}
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@ -145,19 +147,19 @@ uint32_t alloc_irq_vector(uint32_t irq)
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/* free the vector allocated via alloc_irq_vector() */
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static void free_irq_vector(uint32_t irq)
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{
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struct irq_desc *desc;
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struct x86_irq_data *irqd;
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uint32_t vr;
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uint64_t rflags;
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if (irq < NR_IRQS) {
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desc = &irq_desc_array[irq];
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irqd = &irq_data[irq];
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if ((irq >= NR_LEGACY_IRQ) && (desc->vector < VECTOR_FIXED_START)) {
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if ((irq >= NR_LEGACY_IRQ) && (irqd->vector < VECTOR_FIXED_START)) {
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/* do nothing for LEGACY_IRQ and static allocated ones */
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spinlock_irqsave_obtain(&irq_alloc_spinlock, &rflags);
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vr = desc->vector;
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desc->vector = VECTOR_INVALID;
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vr = irqd->vector;
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irqd->vector = VECTOR_INVALID;
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vr &= NR_MAX_VECTOR;
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if (vector_to_irq[vr] == irq) {
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@ -220,7 +222,7 @@ int32_t request_irq(uint32_t req_irq, irq_action_t action_fn, void *priv_data,
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spinlock_irqrestore_release(&desc->lock, rflags);
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ret = (int32_t)irq;
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dev_dbg(DBG_LEVEL_IRQ, "[%s] irq%d vr:0x%x", __func__, irq, desc->vector);
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dev_dbg(DBG_LEVEL_IRQ, "[%s] irq%d vr:0x%x", __func__, irq, vector);
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} else {
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ret = -EBUSY;
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pr_err("%s: request irq(%u) vr(%u) failed, already requested", __func__,
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@ -274,9 +276,9 @@ uint32_t irq_to_vector(uint32_t irq)
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{
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uint32_t ret;
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if (irq < NR_IRQS) {
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ret = irq_desc_array[irq].vector;
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ret = irq_data[irq].vector;
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} else {
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ret = VECTOR_INVALID;
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ret = VECTOR_INVALID;
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}
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return ret;
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@ -336,6 +338,7 @@ void dispatch_interrupt(const struct intr_excp_ctx *ctx)
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uint32_t vr = ctx->vector;
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uint32_t irq = vector_to_irq[vr];
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struct irq_desc *desc;
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struct x86_irq_data *irqd;
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/* The value from vector_to_irq[] must be:
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* IRQ_INVALID, which means the vector is not allocated;
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@ -345,15 +348,16 @@ void dispatch_interrupt(const struct intr_excp_ctx *ctx)
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*/
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if (irq < NR_IRQS) {
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desc = &irq_desc_array[irq];
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irqd = desc->arch_data;
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per_cpu(irq_count, get_pcpu_id())[irq]++;
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if ((vr == desc->vector) &&
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if ((vr == irqd->vector) &&
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bitmap_test((uint16_t)(irq & 0x3FU), irq_alloc_bitmap + (irq >> 6U))) {
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#ifdef PROFILING_ON
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/* Saves ctx info into irq_desc */
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desc->ctx_rip = ctx->rip;
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desc->ctx_rflags = ctx->rflags;
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desc->ctx_cs = ctx->cs;
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irqd->ctx_rip = ctx->rip;
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irqd->ctx_rflags = ctx->rflags;
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irqd->ctx_cs = ctx->cs;
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#endif
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handle_irq(desc);
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}
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@ -428,8 +432,9 @@ static void init_irq_descs(void)
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}
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for (i = 0U; i < NR_IRQS; i++) {
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irq_data[i].vector = VECTOR_INVALID;
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irq_desc_array[i].irq = i;
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irq_desc_array[i].vector = VECTOR_INVALID;
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irq_desc_array[i].arch_data = &irq_data[i];
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spinlock_init(&irq_desc_array[i].lock);
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}
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@ -442,7 +447,7 @@ static void init_irq_descs(void)
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uint32_t irq = irq_static_mappings[i].irq;
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uint32_t vr = irq_static_mappings[i].vector;
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irq_desc_array[irq].vector = vr;
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irq_data[irq].vector = vr;
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vector_to_irq[vr] = irq;
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bitmap_set_nolock((uint16_t)(irq & 0x3FU),
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irq_alloc_bitmap + (irq >> 6U));
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@ -637,16 +637,16 @@ static void profiling_pmi_handler(uint32_t irq, __unused void *data)
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get_cpu_var(profiling_info.vm_info).external_vector = -1;
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/* Attribute PMI to hypervisor context */
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} else {
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const struct x86_irq_data *irqd = irq_desc_array[irq].arch_data;
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psample->csample.os_id = 0xFFFFU;
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(void)memcpy_s(psample->csample.task, 16, "VMM\0", 4);
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psample->csample.cpu_id = get_pcpu_id();
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psample->csample.process_id = 0U;
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psample->csample.task_id = 0U;
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psample->csample.overflow_status = perf_ovf_status;
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psample->csample.rip = irq_desc_array[irq].ctx_rip;
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psample->csample.rflags
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= (uint32_t)irq_desc_array[irq].ctx_rflags;
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psample->csample.cs = (uint32_t)irq_desc_array[irq].ctx_cs;
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psample->csample.rip = irqd->ctx_rip;
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psample->csample.rflags = (uint32_t)irqd->ctx_rflags;
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psample->csample.cs = (uint32_t)irqd->ctx_cs;
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}
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if ((sep_collection_switch &
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@ -247,6 +247,18 @@ extern uint64_t irq_alloc_bitmap[IRQ_ALLOC_BITMAP_SIZE];
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typedef void (*irq_action_t)(uint32_t irq, void *priv_data);
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/*
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* x86 irq data
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*/
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struct x86_irq_data {
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uint32_t vector; /**< assigned vector */
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#ifdef PROFILING_ON
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uint64_t ctx_rip;
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uint64_t ctx_rflags;
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uint64_t ctx_cs;
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#endif
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};
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/**
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* @brief Interrupt descriptor
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*
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@ -254,18 +266,14 @@ typedef void (*irq_action_t)(uint32_t irq, void *priv_data);
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*/
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struct irq_desc {
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uint32_t irq; /**< index to irq_desc_base */
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uint32_t vector; /**< assigned vector */
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void *arch_data; /**< arch-specific data */
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irq_action_t action; /**< callback registered from component */
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void *priv_data; /**< irq_action private data */
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uint32_t flags; /**< flags for trigger mode/ptdev */
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spinlock_t lock;
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#ifdef PROFILING_ON
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uint64_t ctx_rip;
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uint64_t ctx_rflags;
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uint64_t ctx_cs;
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#endif
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};
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/**
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