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Doc: content edits for GSG for ACRN Ind Scenario
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
This commit is contained in:
parent
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@ -13,12 +13,14 @@ Verified version
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Prerequisites
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Prerequisites
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*************
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*************
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Below example is based on Intel Kaby Lake NUC platform with two disks,
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SATA disk is for Clear Linux based Service VM and the NVMe disk is for RTVM.
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- Intel Kaby Lake (aka KBL) NUC platform with two disks inside.
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The example below is based on the Intel Kaby Lake NUC platform with two
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(refer to :ref:`the tables <hardware_setup>` for detailed information)
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disks, a SATA disk for the Clear Linux-based Service VM and an NVMe disk
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- Installed Clear Linux OS (Ver: 31080) onto both disks on KBL NUC.
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for the RTVM.
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- Intel Kaby Lake (aka KBL) NUC platform with two disks inside
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(refer to :ref:`the tables <hardware_setup>` for detailed information).
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- Clear Linux OS (Ver: 31080) installation onto both disks on the KBL NUC.
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.. _installation guide:
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.. _installation guide:
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https://docs.01.org/clearlinux/latest/get-started/bare-metal-install-server.html
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https://docs.01.org/clearlinux/latest/get-started/bare-metal-install-server.html
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@ -40,7 +42,7 @@ Hardware Setup
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| Kaby Lake | NUC7i7DNH | Processor | - Intel |reg| Core |trade| i7-8650U CPU @ 1.90GHz |
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| Kaby Lake | NUC7i7DNH | Processor | - Intel |reg| Core |trade| i7-8650U CPU @ 1.90GHz |
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| | +----------------------+-----------------------------------------------------------+
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| | +----------------------+-----------------------------------------------------------+
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| | | Graphics | - UHD Graphics 620 |
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| | | Graphics | - UHD Graphics 620 |
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| | | | - Two HDMI* 2.0a ports supporting 4K at 60 Hz |
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| | | | - Two HDMI 2.0a ports supporting 4K at 60 Hz |
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| | +----------------------+-----------------------------------------------------------+
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| | +----------------------+-----------------------------------------------------------+
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| | | System memory | - 8GiB SODIMM DDR4 2400 MHz |
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| | | System memory | - 8GiB SODIMM DDR4 2400 MHz |
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| | +----------------------+-----------------------------------------------------------+
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@ -48,23 +50,25 @@ Hardware Setup
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| | | | - NVMe: 256G Intel Corporation SSD Pro 7600p/760p/E 6100p |
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| | | | - NVMe: 256G Intel Corporation SSD Pro 7600p/760p/E 6100p |
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+----------------------+-------------------+----------------------+-----------------------------------------------------------+
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+----------------------+-------------------+----------------------+-----------------------------------------------------------+
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How to set up ACRN Hypervisor for industry scenario
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Set up the ACRN Hypervisor for industry scenario
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***************************************************
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************************************************
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There are several ways to set up ACRN industry scenario environment. Two of them listed below
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are recommended:
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The ACRN industry scenario environment can be set up in several ways. The
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two listed below are recommended:
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- :ref:`Using the pre-installed industry ACRN hypervisor <use pre-installed industry efi>`
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- :ref:`Using the pre-installed industry ACRN hypervisor <use pre-installed industry efi>`
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- :ref:`Using the ACRN industry out-of-the-box image <use industry ootb image>`
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- :ref:`Using the ACRN industry out-of-the-box image <use industry ootb image>`
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.. _use pre-installed industry efi:
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.. _use pre-installed industry efi:
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Using the pre-installed industry ACRN hypervisor
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Use the pre-installed industry ACRN hypervisor
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================================================
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==============================================
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.. note:: Skip this section if you choose following the :ref:`Using the ACRN industry out-of-the-box image <use industry ootb image>`..
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Firstly we need to follow :ref:`ACRN quick setup guide <quick-setup-guide>` to set up
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.. note:: Skip this section if you choose :ref:`Using the ACRN industry out-of-the-box image <use industry ootb image>`.
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ACRN Service VM. The industry hypervisor image is installed in ``/usr/lib/acrn/``
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directory once the Service VM boots. You may simply follow these steps to use
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Follow :ref:`ACRN quick setup guide <quick-setup-guide>` to set up the
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ACRN Service VM. The industry hypervisor image is installed in the ``/usr/lib/acrn/``
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directory once the Service VM boots. Follow the steps below to use
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``acrn.kbl-nuc-i7.industry.efi`` instead of the original SDC hypervisor:
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``acrn.kbl-nuc-i7.industry.efi`` instead of the original SDC hypervisor:
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.. code-block:: none
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.. code-block:: none
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@ -77,58 +81,62 @@ directory once the Service VM boots. You may simply follow these steps to use
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.. _use industry ootb image:
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.. _use industry ootb image:
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Using the ACRN industry out-of-the-box image
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Use the ACRN industry out-of-the-box image
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============================================
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==========================================
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#. Download the
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#. Download the
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`sos-industry-31080.img.xz <https://github.com/projectacrn/acrn-hypervisor/releases/download/acrn-2019w39.1-140000p/sos-industry-31080.img.xz>`_
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`sos-industry-31080.img.xz <https://github.com/projectacrn/acrn-hypervisor/releases/download/acrn-2019w39.1-140000p/sos-industry-31080.img.xz>`_
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to your development machine.
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to your development machine.
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#. Decompress the xz image
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#. Decompress the xz image:
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.. code-block:: none
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.. code-block:: none
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$ xz -d sos-industry-31080.img.xz
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$ xz -d sos-industry-31080.img.xz
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#. Follow the :ref:`Deploy the Service VM image <deploy_ootb_service_vm>`
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#. Follow the instructions at :ref:`Deploy the Service VM image <deploy_ootb_service_vm>`
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to deploy the Service VM image to the SATA disk.
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to deploy the Service VM image on the SATA disk.
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Install and launch Preempt-RT VM
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Install and launch the Preempt-RT VM
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********************************
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************************************
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#. Download the
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`preempt-rt-31080.img.xz <`https://github.com/projectacrn/acrn-hypervisor/releases/download/acrn-2019w39.1-140000p/preempt-rt-31080.img.xz>`_
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#. Download
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to your development machine.
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`preempt-rt-31080.img.xz <`https://github.com/projectacrn/acrn-hypervisor/releases/download/acrn-2019w39.1-140000p/preempt-rt-31080.img.xz>`_ to your development machine.
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#. Decompress the xz image
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#. Decompress the xz image:
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.. code-block:: none
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.. code-block:: none
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$ xz -d preempt-rt-31080.img.xz
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$ xz -d preempt-rt-31080.img.xz
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#. Follow the :ref:`Deploy the User VM Preempt-RT image <deploy_ootb_rtvm>`
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#. Follow the instructions at :ref:`Deploy the User VM Preempt-RT image <deploy_ootb_rtvm>`
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to deploy the Preempt-RT vm image to the NVMe disk.
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to deploy the Preempt-RT vm image on the NVMe disk.
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#. After deploying is completed, launch RTVM directly on your KBL NUC::
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#. Upon deployment completion, launch the RTVM directly on your KBL NUC::
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$ sudo /usr/share/acrn/samples/nuc/launch_hard_rt_vm.sh
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$ sudo /usr/share/acrn/samples/nuc/launch_hard_rt_vm.sh
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.. note:: Use ``lspci`` command to make sure the correct NMVe device IDs will be used
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.. note:: Use the ``lspci`` command to ensure that the correct NMVe device IDs will be used for the passthru before launching the script::
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for passthru before launch the script::
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$ sudo lspci -v | grep -iE 'nvm|ssd'
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$ sudo lspci -v | grep -iE 'nvm|ssd' 02:00.0 Non-Volatile memory controller: Intel Corporation Device f1a6 (rev 03) (prog-if 02 [NVM Express])
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02:00.0 Non-Volatile memory controller: Intel Corporation Device f1a6 (rev 03) (prog-if 02 [NVM Express])
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$ sudo lspci -nn | grep "Non-Volatile memory controller" 02:00.0 Non-Volatile memory controller [0108]: Intel Corporation Device [8086:f1a6] (rev 03)
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$ sudo lspci -nn | grep "Non-Volatile memory controller"
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02:00.0 Non-Volatile memory controller [0108]: Intel Corporation Device [8086:f1a6] (rev 03)
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RT Performance Test
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RT Performance Test
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*******************
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*******************
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.. _cyclictest:
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Cyclictest introduction
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Cyclictest introduction
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=======================
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=======================
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Cyclictest is most commonly used for benchmarking RT systems. It is one of the
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The cyclictest is most commonly used for benchmarking RT systems. It is one of the
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most frequently used tools for evaluating the relative performance of real-time
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most frequently used tools for evaluating the relative performance of real-time
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systems. Cyclictest accurately and repeatedly measures the difference between a
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systems. Cyclictest accurately and repeatedly measures the difference between a
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thread's intended wake-up time and the time at which it actually wakes up in order
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thread's intended wake-up time and the time at which it actually wakes up in order
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to provide statistics about the system's latencies. It can measure latencies in
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to provide statistics about the system's latencies. It can measure latencies in
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real-time systems caused by the hardware, the firmware, and the operating system.
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real-time systems that are caused by hardware, firmware, and the operating system.
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Cyclictest is currently maintained by Linux Foundation and is part of the test
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The cyclictest is currently maintained by Linux Foundation and is part of the test
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suite rt-tests.
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suite rt-tests.
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Pre-Configurations
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Pre-Configurations
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@ -161,20 +169,22 @@ Recommended BIOS settings
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"ACPI S3 Support", "Intel Advanced Menu -> ACPI Settings", "Disabled"
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"ACPI S3 Support", "Intel Advanced Menu -> ACPI Settings", "Disabled"
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"Native ASPM", "Intel Advanced Menu -> ACPI Settings", "Disabled"
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"Native ASPM", "Intel Advanced Menu -> ACPI Settings", "Disabled"
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.. note:: The BIOS settings depend on platform and BIOS version, some ones may not be applicable.
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.. note:: The BIOS settings depend on the platform and BIOS version; some may not be applicable.
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Configure CAT
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Configure CAT
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-------------
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-------------
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With the ACRN Hypervisor shell, we can use ``cpuid``, ``wrmsr``/``rdmsr`` debug
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commands to enumerate CAT capability and set CAT configuration without rebuild binaries.
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With the ACRN Hypervisor shell, we can use ``cpuid`` and ``wrmsr``/``rdmsr`` debug
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Because ``lapic`` is pass-through to the RTVM, so CAT configuration need to be
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commands to enumerate the CAT capability and set the CAT configuration without rebuilding binaries.
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set before launching RTVM.
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Because ``lapic`` is a pass-through to the RTVM, the CAT configuration must be
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set before launching the RTVM.
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Check CAT ability with cupid
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Check CAT ability with cupid
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````````````````````````````
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````````````````````````````
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First run ``cpuid 0x10 0x0``, the return value ``ebx[bit 2]`` reports the L2 CAT is supported.
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Then run ``cpuid 0x10 0x2`` to query L2 CAT capability, the return value ``eax[bit 4:0]``
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First run ``cpuid 0x10 0x0``. The return value of ``ebx[bit 2]`` reports that the L2 CAT is supported.
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reports the cache mask has 8 bit, and ``edx[bit 15:0]`` reports 4 CLOS are supported,
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Next, run ``cpuid 0x10 0x2`` to query the L2 CAT capability; the return value of ``eax[bit 4:0]``
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reports that the cache mask has 8 bits, and ``edx[bit 15:0]`` reports that 04 CLOS are supported,
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as shown below. The reported data is in the format of ``[ eax:ebx:ecx:edx ]``::
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as shown below. The reported data is in the format of ``[ eax:ebx:ecx:edx ]``::
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ACRN:\>cpuid 0x10 0x0
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ACRN:\>cpuid 0x10 0x0
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@ -185,25 +195,24 @@ as shown below. The reported data is in the format of ``[ eax:ebx:ecx:edx ]``::
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Set CLOS (QOS MASK) and PQR_ASSOC MSRs to configure the CAT
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Set CLOS (QOS MASK) and PQR_ASSOC MSRs to configure the CAT
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```````````````````````````````````````````````````````````
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```````````````````````````````````````````````````````````
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ApolloLake doesn't have L3 cache, and supports L2 CAT. The CLOS MSRs are per L2 cache,
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starts from 0x00000D10, in the case there is 4 CLOS MSRs, the address of CLOS MSRs::
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Apollo Lake doesn't have L3 cache and it supports L2 CAT. The CLOS MSRs are per L2 cache and starts from 0x00000D10. In the case of 4 CLOS MSRs, the address is as follows::
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MSR_IA32_L2_QOS_MASK_0 0x00000D10
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MSR_IA32_L2_QOS_MASK_0 0x00000D10
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MSR_IA32_L2_QOS_MASK_1 0x00000D11
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MSR_IA32_L2_QOS_MASK_1 0x00000D11
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MSR_IA32_L2_QOS_MASK_2 0x00000D12
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MSR_IA32_L2_QOS_MASK_2 0x00000D12
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MSR_IA32_L2_QOS_MASK_3 0x00000D13
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MSR_IA32_L2_QOS_MASK_3 0x00000D13
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And the PQR_ASSOC MSR is per CPU core, each core has its own PQR_ASSOC::
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The PQR_ASSOC MSR is per CPU core; each core has its own PQR_ASSOC::
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MSR_IA32_PQR_ASSOC 0x00000C8F
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MSR_IA32_PQR_ASSOC 0x00000C8F
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To set the CAT, we need to set the CLOS MSRs and then set PQR_ASSOC of each CPU,
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To set the CAT, first set the CLOS MSRs. Next, set the PQR_ASSOC of each CPU
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so that the CPU of RTVM to use dedicated cache ways and other CPUs to use the cache ways.
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so that the CPU of the RTVM uses dedicated cache and other CPUs use other cache.
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Taking a Quad Core ApolloLake platform for example, CPU0 and CPU1 share a L2 cache
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Taking a Quad Core Apollo Lake platform for example, CPU0 and CPU1 share L2 cache while CPU2 and CPU3 share the other L2 cache.
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and CPU2 and CPU3 share the other L2 cache.
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- If we allocate CPU2 and CPU3, there is no extra action required.
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- If we allocate CPU2 and CPU3, no extra action is required.
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- If we allocate only CPU1 to the RTVM, we need to set CAT as follows.
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- If we allocate only CPU1 to the RTVM, we need to set the CAT as follows.
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These commands actually set the CAT configuration for L2 cache shared by CPU0 and CPU1.
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These commands actually set the CAT configuration for L2 cache shared by CPU0 and CPU1.
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a. Set CLOS with ``wrmsr <reg_num> <value>``, we want VM1 to use the lower 6 ways of cache,
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a. Set CLOS with ``wrmsr <reg_num> <value>``, we want VM1 to use the lower 6 ways of cache,
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@ -212,21 +221,22 @@ a. Set CLOS with ``wrmsr <reg_num> <value>``, we want VM1 to use the lower 6 way
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ACRN:\>wrmsr -p1 0xd10 0xf0
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ACRN:\>wrmsr -p1 0xd10 0xf0
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ACRN:\>wrmsr -p1 0xd11 0x0f
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ACRN:\>wrmsr -p1 0xd11 0x0f
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#. Attach COS1 to PCPU1. Because MSR IA32_PQR_ASSOC [bit 63:32], we’ll write
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#. Attach COS1 to PCPU1. Because MSR is IA32_PQR_ASSOC [bit 63:32], we’ll write
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0x100000000 to it to use CLOS1::
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0x100000000 to it to use CLOS1::
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ACRN:\>wrmsr -p0 0xc8f 0x000000000
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ACRN:\>wrmsr -p0 0xc8f 0x000000000
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ACRN:\>wrmsr -p1 0xc8f 0x100000000
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ACRN:\>wrmsr -p1 0xc8f 0x100000000
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In addition to set the CAT configuration via HV commands, we allow developers to add
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In addition to setting the CAT configuration via HV commands, we allow developers to add
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the CAT configurations to the VM config and do the configure automatically at the
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the CAT configurations to the VM config and do the configure automatically at the
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time of RTVM creation, please refer to the :ref:`configure_cat_vm` for the details.
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time of RTVM creation. Refer to the :ref:`configure_cat_vm` for details.
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Set up core allocation for RTVM
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Set up the core allocation for the RTVM
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-------------------------------
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---------------------------------------
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In our recommended configuration, 2 cores will be allocated to RTVM:
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In our recommended configuration, two cores are allocated to the RTVM:
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core 0 for housekeeping and core 1 for RT tasks. In order to achieve
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core 0 for housekeeping and core 1 for RT tasks. In order to achieve
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this, follow below steps to allocate all housekeeping tasks to core 0:
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this, follow the below steps to allocate all housekeeping tasks to core 0:
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.. code-block:: bash
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.. code-block:: bash
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@ -255,15 +265,16 @@ this, follow below steps to allocate all housekeeping tasks to core 0:
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Run cyclictest
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Run cyclictest
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==============
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==============
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Use below command to start cyclictest::
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Use the following command to start cyclictest::
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$ cyclictest -a 1 -p 80 -m -N -D 1h -q -H 30000 --histfile=test.log
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$ cyclictest -a 1 -p 80 -m -N -D 1h -q -H 30000 --histfile=test.log
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- Usage:
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- Usage:
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:-a 1: to bind the RT task to core 1
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:-a 1: to bind the RT task to core 1
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:-p 80: to set priority of highest prio thread
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:-p 80: to set the priority of the highest prio thread
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:-N: print results in ns instead of us (default us)
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:-N: print results in ns instead of us (default us)
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:-D 1h: to run it for 1 hour, you can change it to other value
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:-D 1h: to run for 1 hour, you can change it to other values
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:-q: quite mode, print a summary only on exit
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:-q: quiee mode; print a summary only on exit
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:-H 30000 --histfile=test.log: dump the latency histogram to local file
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:-H 30000 --histfile=test.log: dump the latency histogram to a local file
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