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HV: return -1 with invalid vcpuid in pt icr access

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vm_apicid2vcpu_id() might return invalid vcpu id, when this happens
we should return -1 in vlapic_x2apic_pt_icr_access();

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
This commit is contained in:
Victor Sun 2019-06-03 00:37:17 +08:00 committed by ACRN System Integration
parent ae7dcf443d
commit f4e976ab38
1 changed files with 2 additions and 3 deletions
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5
hypervisor/arch/x86/guest/vlapic.c
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@ -140,7 +140,6 @@ static uint16_t vm_apicid2vcpu_id(struct acrn_vm *vm, uint32_t lapicid)
} }
if (cpu_id == INVALID_CPU_ID) { if (cpu_id == INVALID_CPU_ID) {
cpu_id = get_pcpu_nums();
pr_err("%s: bad lapicid %lu", __func__, lapicid); pr_err("%s: bad lapicid %lu", __func__, lapicid);
} }
@ -2006,7 +2005,7 @@ vlapic_x2apic_pt_icr_access(struct acrn_vm *vm, uint64_t val)
struct acrn_vcpu *target_vcpu; struct acrn_vcpu *target_vcpu;
bool phys; bool phys;
uint32_t shorthand; uint32_t shorthand;
int32_t ret = 0; int32_t ret = -1;
phys = ((icr_low & APIC_DESTMODE_LOG) == 0UL); phys = ((icr_low & APIC_DESTMODE_LOG) == 0UL);
shorthand = icr_low & APIC_DEST_MASK; shorthand = icr_low & APIC_DEST_MASK;
@ -2014,7 +2013,6 @@ vlapic_x2apic_pt_icr_access(struct acrn_vm *vm, uint64_t val)
if ((phys == false) || (shorthand != APIC_DEST_DESTFLD)) { if ((phys == false) || (shorthand != APIC_DEST_DESTFLD)) {
pr_err("Logical destination mode or shorthands \ pr_err("Logical destination mode or shorthands \
not supported in ICR forpartition mode\n"); not supported in ICR forpartition mode\n");
ret = -1;
} else { } else {
vcpu_id = vm_apicid2vcpu_id(vm, vapic_id); vcpu_id = vm_apicid2vcpu_id(vm, vapic_id);
if ((vcpu_id < vm->hw.created_vcpus) && (vm->hw.vcpu_array[vcpu_id].state != VCPU_OFFLINE)) { if ((vcpu_id < vm->hw.created_vcpus) && (vm->hw.vcpu_array[vcpu_id].state != VCPU_OFFLINE)) {
@ -2036,6 +2034,7 @@ vlapic_x2apic_pt_icr_access(struct acrn_vm *vm, uint64_t val)
msr_write(MSR_IA32_EXT_APIC_ICR, (((uint64_t)papic_id) << 32U) | icr_low); msr_write(MSR_IA32_EXT_APIC_ICR, (((uint64_t)papic_id) << 32U) | icr_low);
break; break;
} }
ret = 0;
} }
} }
return ret; return ret;