diff --git a/hypervisor/include/arch/x86/guest/vm.h b/hypervisor/include/arch/x86/guest/vm.h index 87405ccbb..9c181c289 100644 --- a/hypervisor/include/arch/x86/guest/vm.h +++ b/hypervisor/include/arch/x86/guest/vm.h @@ -10,6 +10,7 @@ #ifdef CONFIG_PARTITION_MODE #include +#include #endif enum vm_privilege_level { VM_PRIVILEGE_LEVEL_HIGH = 0, @@ -164,9 +165,17 @@ struct vm { struct vcpuid_entry vcpuid_entries[MAX_VM_VCPUID_ENTRIES]; #ifdef CONFIG_PARTITION_MODE struct vm_description *vm_desc; + struct vpci vpci; #endif }; +#ifdef CONFIG_PARTITION_MODE +struct vpci_vdev_array { + int num_pci_vdev; + struct pci_vdev vpci_vdev_list[]; +}; +#endif + struct vm_description { /* The physical CPU IDs associated with this VM - The first CPU listed * will be the VM's BSP @@ -180,6 +189,7 @@ struct vm_description { uint8_t vm_id; struct mptable_info *mptable; const char *bootargs; + struct vpci_vdev_array *vpci_vdev_array; #endif }; @@ -195,6 +205,10 @@ int prepare_vm(uint16_t pcpu_id); void vm_fixup(struct vm *vm); #endif +#ifdef CONFIG_PARTITION_MODE +const struct vm_description_array *get_vm_desc_base(void); +#endif + struct vm *get_vm_from_vmid(uint16_t vm_id); extern struct list_head vm_list; diff --git a/hypervisor/include/dm/vpci/vpci.h b/hypervisor/include/dm/vpci/vpci.h new file mode 100644 index 000000000..51cc7f020 --- /dev/null +++ b/hypervisor/include/dm/vpci/vpci.h @@ -0,0 +1,95 @@ +/*- +* Copyright (c) 2011 NetApp, Inc. +* Copyright (c) 2018 Intel Corporation +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* 1. Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* 2. Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* +* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE +* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +* SUCH DAMAGE. +* +* $FreeBSD$ +*/ + +#ifndef VPCI_H_ +#define VPCI_H_ + +#define PCI_BAR_COUNT 0x6U +#define PCI_REGMAX 0xFFU +#define PCIM_BAR_MEM_32 0U +#define PCIM_BAR_MEM_64 4U + +#define PCI_BDF(b, d, f) (((b & 0xFFU) << 8) \ + | ((d & 0x1FU) << 3) | ((f & 0x7U))) + +#define ALIGN_UP(x, y) (((x)+((y)-1))&(~((y)-1U))) +#define ALIGN_UP_4K(x) ALIGN_UP(x, 4096) + +struct pci_vdev; +struct pci_vdev_ops { + int (*init)(struct pci_vdev *vdev); + + int (*deinit)(struct pci_vdev *vdev); + + int (*cfgwrite)(struct pci_vdev *vdev, uint32_t offset, + uint32_t bytes, uint32_t val); + + int (*cfgread)(struct pci_vdev *vdev, uint32_t offset, + uint32_t bytes, uint32_t *val); +}; + +struct pcibar { + uint64_t base; + uint64_t size; + uint8_t type; +}; + +struct pci_pdev { + /* The bar info of the physical PCI device. */ + struct pcibar bar[PCI_BAR_COUNT]; + + /* The bus/device/function triple of the physical PCI device. */ + uint16_t bdf; +}; + +struct pci_vdev { + struct pci_vdev_ops *ops; + struct vpci *vpci; + /* The bus/device/function triple of the virtual PCI device. */ + uint16_t vbdf; + + struct pci_pdev pdev; + + uint8_t cfgdata[PCI_REGMAX + 1U]; + + /* The bar info of the virtual PCI device. */ + struct pcibar bar[PCI_BAR_COUNT]; +}; + +struct pci_addr_info { + uint16_t cached_bdf; + uint32_t cached_reg, cached_enable; +}; + +struct vpci { + struct vm *vm; + struct pci_addr_info addr_info; +}; + +#endif /* VPCI_H_ */ diff --git a/hypervisor/partition/vm_description.c b/hypervisor/partition/vm_description.c new file mode 100644 index 000000000..2cf5a1617 --- /dev/null +++ b/hypervisor/partition/vm_description.c @@ -0,0 +1,126 @@ +/* + * Copyright (C) 2018 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include + +static struct vpci_vdev_array vpci_vdev_array1 = { + .num_pci_vdev = 2, + + .vpci_vdev_list = { + {/*vdev 0: hostbridge */ + .vbdf = PCI_BDF(0x00U, 0x00U, 0x00U), + .ops = NULL, + .bar = {}, /* don't care for hostbridge */ + .pdev = {} /* don't care for hostbridge */ + }, + + {/*vdev 1*/ + .vbdf = PCI_BDF(0x00U, 0x01U, 0x00U), + .ops = NULL, + .bar = { + [0] = { + .base = 0UL, + .size = ALIGN_UP_4K(0x100UL), + .type = PCIM_BAR_MEM_32 + }, + [5] = { + .base = 0UL, + .size = ALIGN_UP_4K(0x2000UL), + .type = PCIM_BAR_MEM_32 + }, + }, + .pdev = { + .bdf = PCI_BDF(0x00U, 0x01U, 0x00U), + .bar = { + [0] = { + .base = 0xa9000000UL, + .size = 0x100UL, + .type = PCIM_BAR_MEM_32 + }, + [5] = { + .base = 0x1a0000000UL, + .size = 0x2000UL, + .type = PCIM_BAR_MEM_64 + }, + } + } + }, + } +}; + + +static struct vpci_vdev_array vpci_vdev_array2 = { + .num_pci_vdev = 2, + + .vpci_vdev_list = { + {/*vdev 0: hostbridge*/ + .vbdf = PCI_BDF(0x00U, 0x00U, 0x00U), + .ops = NULL, + .bar = {}, /* don't care for hostbridge */ + .pdev = {} /* don't care for hostbridge */ + }, + + {/*vdev 1*/ + .vbdf = PCI_BDF(0x00U, 0x01U, 0x00U), + .ops = NULL, + .bar = { + [0] = { + .base = 0UL, + .size = ALIGN_UP_4K(0x100UL), + .type = PCIM_BAR_MEM_32 + }, + [5] = { + .base = 0UL, + .size = ALIGN_UP_4K(0x2000UL), + .type = PCIM_BAR_MEM_32 + }, + }, + .pdev = { + .bdf = PCI_BDF(0x00U, 0x02U, 0x00U), + .bar = { + [0] = { + .base = 0xa8000000UL, + .size = 0x100UL, + .type = PCIM_BAR_MEM_32 + }, + [5] = { + .base = 0x1b0000000UL, + .size = 0x2000UL, + .type = PCIM_BAR_MEM_64 + }, + } + } + }, + } +}; + +/*******************************/ +/* User Defined VM definitions */ +/*******************************/ +const struct vm_description_array vm_desc_partition = { + /* Number of user virtual machines */ + .num_vm_desc = 2, + + .vm_desc_array = { + { + /* vm1 */ + .vm_hw_num_cores = 2, + .vpci_vdev_array = &vpci_vdev_array1, + }, + + { + /* vm2 */ + .vm_hw_num_cores = 2, + .vpci_vdev_array = &vpci_vdev_array2, + }, + } +}; + +const struct vm_description_array *get_vm_desc_base(void) +{ + return &vm_desc_partition; +} +