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HV: treewide: terminate 'if .. else if' constructs with 'else'

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MISRA C requires that a 'if' statement followed by one or more 'else if'
statement shall be terminated by an 'else' statement which contains either
side-effect or a comment, to ensure that conditions are considered
exhaustively.

Note that a simple 'if' statement is not required to be terminated by 'else'.

This patch fixes such violations by either refactoring the code or add the
'else' statement with either a comment (describing why this case can be skipped)
or logging the event. It may not be satisfactory for the release version where
logging is no-op, but properly handling these non-trivial cases is out of the
scope of this patch.

v1 -> v2:

    * Fix unintended semantic changes in add_(msix|intx)_remapping and
      io_instr_vmexit_handler.
    * Simplify boolean checks in vpic_ocw2.
    * Rephrase the comment in strtol_deci.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Junjie Mao
2018-07-18 22:59:56 +08:00
committed by lijinxia
parent e13c852c4b
commit f691cab994
15 changed files with 151 additions and 77 deletions
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52
hypervisor/arch/x86/io.c
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@@ -76,6 +76,14 @@ int io_instr_vmexit_handler(struct vcpu *vcpu)
TRACE_4I(TRACE_VMEXIT_IO_INSTRUCTION, port, (uint32_t)direction, sz,
(uint32_t)cur_context_idx);
/*
* Post-conditions of the loop:
*
* status == 0 : The access has been handled properly.
* status == -EIO : The access spans multiple devices and cannot
* be handled.
* status == -EINVAL : No valid handler found for this access.
*/
for (handler = vm->arch_vm.io_handler;
handler; handler = handler->next) {
@@ -86,45 +94,45 @@ int io_instr_vmexit_handler(struct vcpu *vcpu)
<= (handler->desc.addr + handler->desc.len)))) {
pr_fatal("Err:IO, port 0x%04x, size=%u spans devices",
port, sz);
return -EIO;
}
if (direction == 0) {
handler->desc.io_write(handler, vm, port, sz,
cur_context->guest_cpu_regs.regs.rax);
pr_dbg("IO write on port %04x, data %08x", port,
cur_context->guest_cpu_regs.regs.rax & mask);
status = 0;
status = -EIO;
break;
} else {
uint32_t data = handler->desc.io_read(handler, vm,
port, sz);
struct cpu_regs *regs =
&cur_context->guest_cpu_regs.regs;
cur_context->guest_cpu_regs.regs.rax &= ~mask;
cur_context->guest_cpu_regs.regs.rax |= data & mask;
if (direction == 0) {
handler->desc.io_write(handler, vm, port, sz,
regs->rax);
pr_dbg("IO read on port %04x, data %08x", port, data);
pr_dbg("IO write on port %04x, data %08x", port,
regs->rax & mask);
} else {
uint32_t data = handler->desc.io_read(handler,
vm, port, sz);
regs->rax &= ~mask;
regs->rax |= data & mask;
pr_dbg("IO read on port %04x, data %08x",
port, data);
}
status = 0;
break;
}
}
/* Go for VHM */
if (status != 0) {
if (status == -EINVAL) {
uint64_t *rax = &cur_context->guest_cpu_regs.regs.rax;
(void)memset(&vcpu->req, 0, sizeof(struct vhm_request));
dm_emulate_pio_pre(vcpu, exit_qual, sz, *rax);
status = acrn_insert_request_wait(vcpu, &vcpu->req);
}
if (status != 0) {
pr_fatal("Err:IO %s access to port 0x%04x, size=%u",
(direction != 0) ? "read" : "write", port, sz);
if (status != 0) {
pr_fatal("Err:IO %s access to port 0x%04x, size=%u",
(direction != 0) ? "read" : "write", port, sz);
}
}
return status;