From f7efd0fee5eea7c4c3fa16dbaaeb125c630302bf Mon Sep 17 00:00:00 2001 From: "Li, Fei1" Date: Mon, 16 Jul 2018 16:44:29 +0800 Subject: [PATCH] hv: mmu: replace modify_mem with mmu_modify Signed-off-by: Li, Fei1 Acked-by: Anthony Xu --- hypervisor/arch/x86/mmu.c | 55 ++++--------------------------- hypervisor/include/arch/x86/mmu.h | 2 -- 2 files changed, 6 insertions(+), 51 deletions(-) diff --git a/hypervisor/arch/x86/mmu.c b/hypervisor/arch/x86/mmu.c index ff8050123..d8c04e648 100644 --- a/hypervisor/arch/x86/mmu.c +++ b/hypervisor/arch/x86/mmu.c @@ -35,7 +35,6 @@ static void *mmu_pml4_addr; enum mem_map_request_type { PAGING_REQUEST_TYPE_MAP = 0, /* Creates a new mapping. */ PAGING_REQUEST_TYPE_UNMAP = 1, /* Removes a pre-existing entry */ - PAGING_REQUEST_TYPE_MODIFY = 2, /* Modifies a pre-existing entries attributes. */ PAGING_REQUEST_TYPE_UNKNOWN, }; @@ -366,25 +365,6 @@ static uint32_t map_mem_region(void *vaddr, void *paddr, } break; } - case PAGING_REQUEST_TYPE_MODIFY: - { - /* Allow mapping or modification as requested. */ - table_entry = ((table_type == PTT_EPT) - ? attr : (attr | IA32E_COMM_P_BIT)); - - table_entry |= (uint64_t) paddr; - - /* Write the table entry to map this memory */ - mem_write64(table_base + table_offset, table_entry); - - /* Modify, need to invalidate TLB and - * page-structure cache - */ - if (table_type == PTT_HOST) { - mmu_need_invtlb = true; - } - break; - } default: ASSERT(false, "Bad memory map request type"); return 0; @@ -581,9 +561,6 @@ void init_paging(void) struct e820_entry *entry; uint64_t hv_hpa; uint32_t i; - int attr_wb = (MMU_MEM_ATTR_BIT_READ_WRITE | - MMU_MEM_ATTR_BIT_USER_ACCESSIBLE | - MMU_MEM_ATTR_TYPE_CACHED_WB); int attr_uc = (MMU_MEM_ATTR_BIT_READ_WRITE | MMU_MEM_ATTR_BIT_USER_ACCESSIBLE | MMU_MEM_ATTR_TYPE_UNCACHED); @@ -610,9 +587,10 @@ void init_paging(void) for (i = 0U; i < e820_entries; i++) { entry = &e820[i]; if (entry->type == E820_TYPE_RAM) { - modify_mem(&map_params, (void *)entry->baseaddr, - (void *)entry->baseaddr, - entry->length, attr_wb); + mmu_modify((uint64_t *)mmu_pml4_addr, + entry->baseaddr, entry->length, + PAGE_CACHE_WB, PAGE_CACHE_MASK, + PTT_HOST); } } @@ -620,10 +598,8 @@ void init_paging(void) * to supervisor-mode for hypervisor owned memroy. */ hv_hpa = get_hv_image_base(); - modify_mem(&map_params, (void *)hv_hpa, (void *)hv_hpa, - CONFIG_RAM_SIZE, attr_wb & (~MMU_MEM_ATTR_BIT_USER_ACCESSIBLE)); - - pr_dbg("Enabling MMU "); + mmu_modify((uint64_t *)mmu_pml4_addr, hv_hpa, CONFIG_RAM_SIZE, + PAGE_CACHE_WB, PAGE_CACHE_MASK | PAGE_USER, PTT_HOST); /* Enable paging */ enable_paging(HVA2HPA(mmu_pml4_addr)); @@ -1088,22 +1064,3 @@ int unmap_mem(struct map_params *map_params, void *paddr, void *vaddr, } return ret; } - -int modify_mem(struct map_params *map_params, void *paddr, void *vaddr, - uint64_t size, uint32_t flags) -{ - int ret = 0; - - /* used for MMU and EPT*/ - ret = modify_paging(map_params, paddr, vaddr, size, flags, - PAGING_REQUEST_TYPE_MODIFY, true); - if (ret < 0) { - return ret; - } - /* only for EPT */ - if (map_params->page_table_type == PTT_EPT) { - ret = modify_paging(map_params, vaddr, paddr, size, flags, - PAGING_REQUEST_TYPE_MODIFY, false); - } - return ret; -} diff --git a/hypervisor/include/arch/x86/mmu.h b/hypervisor/include/arch/x86/mmu.h index f816f9b54..d9da0f696 100644 --- a/hypervisor/include/arch/x86/mmu.h +++ b/hypervisor/include/arch/x86/mmu.h @@ -325,8 +325,6 @@ int map_mem(struct map_params *map_params, void *paddr, void *vaddr, uint64_t size, uint32_t flags); int unmap_mem(struct map_params *map_params, void *paddr, void *vaddr, uint64_t size, uint32_t flags); -int modify_mem(struct map_params *map_params, void *paddr, void *vaddr, - uint64_t size, uint32_t flags); int mmu_modify(uint64_t *pml4_page, uint64_t vaddr_base, uint64_t size, uint64_t prot_set, uint64_t prot_clr,