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HV:MM:add 'U/UL' suffix for unsigned contant value

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In the current memory module, there are many constatn value
without U/UL suffix, it is reported as MISRA C violations by
static analysis tool.

Add 'U/UL' suffix for unsigned contant value in memory module
as needed.

Note:In the most case, CPU_PAGE_SIZE(0x1000) is used as
unsigned integer contant value, so CPU_PAGE_SIZE is defined
as unsigned integer contant value, and it is safety converted
into unsigned long type according to MISRA C standard.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Xiangyang Wu
2018-07-10 14:37:31 +08:00
committed by lijinxia
parent b25caad29e
commit f81fcf2f07
11 changed files with 41 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/include/arch/x86/cpu.h
View File

@@ -40,7 +40,7 @@
/* Define page size */
#define CPU_PAGE_SHIFT 12
#define CPU_PAGE_SIZE 0x1000
#define CPU_PAGE_SIZE 0x1000U
#define CPU_PAGE_MASK 0xFFFFFFFFFFFFF000UL
#define MMU_PTE_PAGE_SHIFT CPU_PAGE_SHIFT

4
hypervisor/include/arch/x86/io.h
View File

@@ -331,8 +331,8 @@ enum mem_io_type {
};
/* MMIO emulation related structures */
#define MMIO_TRANS_VALID 1
#define MMIO_TRANS_INVALID 0
#define MMIO_TRANS_VALID 1U
#define MMIO_TRANS_INVALID 0U
struct mem_io {
uint64_t paddr; /* Physical address being accessed */
enum mem_io_type read_write; /* 0 = read / 1 = write operation */

8
hypervisor/include/arch/x86/mmu.h
View File

@@ -8,7 +8,7 @@
#define MMU_H
/* Size of all page-table entries (in bytes) */
#define IA32E_COMM_ENTRY_SIZE 8
#define IA32E_COMM_ENTRY_SIZE 8U
/* Definitions common for all IA-32e related paging entries */
#define IA32E_COMM_P_BIT 0x0000000000000001UL
@@ -144,8 +144,8 @@
/* IA32E Paging constants */
#define IA32E_INDEX_MASK_BITS 9
#define IA32E_NUM_ENTRIES 512
#define IA32E_INDEX_MASK (uint64_t)(IA32E_NUM_ENTRIES - 1)
#define IA32E_NUM_ENTRIES 512U
#define IA32E_INDEX_MASK (uint64_t)(IA32E_NUM_ENTRIES - 1U)
#define IA32E_REF_MASK \
(boot_cpu_data.physical_address_mask)
#define IA32E_FIRST_BLOCK_INDEX 1
@@ -210,7 +210,7 @@
#define MMU_MEM_ATTR_TYPE_MASK \
(IA32E_PDPTE_PAT_BIT | IA32E_COMM_PCD_BIT | IA32E_COMM_PWT_BIT)
#define ROUND_PAGE_UP(addr) (((addr) + CPU_PAGE_SIZE - 1U) & CPU_PAGE_MASK)
#define ROUND_PAGE_UP(addr) (((addr) + (uint64_t)CPU_PAGE_SIZE - 1UL) & CPU_PAGE_MASK)
#define ROUND_PAGE_DOWN(addr) ((addr) & CPU_PAGE_MASK)
enum _page_table_type {

2
hypervisor/include/arch/x86/trusty.h
View File

@@ -7,7 +7,7 @@
#ifndef TRUSTY_H_
#define TRUSTY_H_
#define BOOTLOADER_SEED_MAX_ENTRIES 10
#define BOOTLOADER_SEED_MAX_ENTRIES 10U
#define RPMB_MAX_PARTITION_NUMBER 6
#define MMC_PROD_NAME_WITH_PSN_LEN 15
#define BUP_MKHI_BOOTLOADER_SEED_LEN 64

8
hypervisor/include/arch/x86/vmx.h
View File

@@ -317,10 +317,10 @@
#define VMX_MIN_NR_VPID 1
#define VMX_MAX_NR_VPID (1 << 5)
#define VMX_VPID_TYPE_INDIVIDUAL_ADDR 0
#define VMX_VPID_TYPE_SINGLE_CONTEXT 1
#define VMX_VPID_TYPE_ALL_CONTEXT 2
#define VMX_VPID_TYPE_SINGLE_NON_GLOBAL 3
#define VMX_VPID_TYPE_INDIVIDUAL_ADDR 0UL
#define VMX_VPID_TYPE_SINGLE_CONTEXT 1UL
#define VMX_VPID_TYPE_ALL_CONTEXT 2UL
#define VMX_VPID_TYPE_SINGLE_NON_GLOBAL 3UL
#define VMX_VPID_INVVPID (1U << 0) /* (32 - 32) */
#define VMX_VPID_INVVPID_INDIVIDUAL_ADDR (1U << 8) /* (40 - 32) */