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acrn-config: move source code of IVSHMEM region name to ivshmem_cfg.h

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move MACRO of IVSHMEM region name to ivshmem_cfg.h and bug fix that
avoids multiple declarations of mem_regions in ivshmem_cfg.h

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This commit is contained in:
Shuang Zheng 2020-09-16 16:25:14 +08:00 committed by wenlingz
parent 4617762419
commit f838dbaaf9
9 changed files with 101 additions and 24 deletions
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13
misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/ivshmem_cfg.h
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@ -8,7 +8,8 @@
#include <ivshmem.h>
#include <pgtable.h>
#include <pci_devices.h>
#define IVSHMEM_SHM_REGION_0 "hv:/shm_region_0"
/*
* The IVSHMEM_SHM_SIZE is the sum of all memory regions.
@ -18,12 +19,10 @@
#define IVSHMEM_DEV_NUM 2UL
/* All user defined memory regions */
struct ivshmem_shm_region mem_regions[] = {
{
.name = IVSHMEM_SHM_REGION_0,
.size = 0x200000UL, /* 2M */
#define IVSHMEM_SHM_REGIONS \
{ \
.name = IVSHMEM_SHM_REGION_0, \
.size = 0x200000UL, /* 2M */ \
},
};
#endif /* IVSHMEM_CFG_H */

2
misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/pci_dev.c
View File

@ -10,7 +10,7 @@
#include <vbar_base.h>
#include <mmu.h>
#include <page.h>
#include <ivshmem.h>
#include <ivshmem_cfg.h>
/*
* TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for

2
misc/vm_configs/scenarios/hybrid_rt/vm_configurations.h
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@ -23,7 +23,7 @@
GUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING)
#define VM0_CONFIG_MEM_START_HPA 0x100000000UL
#define VM0_CONFIG_MEM_SIZE 0x40000000UL
#define VM0_CONFIG_MEM_SIZE 0xC0000000UL
#define VM0_CONFIG_MEM_START_HPA2 0x0UL
#define VM0_CONFIG_MEM_SIZE_HPA2 0x0UL

8
misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/ivshmem_cfg.h
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@ -8,7 +8,8 @@
#include <ivshmem.h>
#include <pgtable.h>
#include <pci_devices.h>
#define IVSHMEM_SHM_REGION_0 "hv:/shm_region_0"
/*
* The IVSHMEM_SHM_SIZE is the sum of all memory regions.
@ -18,11 +19,10 @@
#define IVSHMEM_DEV_NUM 2UL
/* All user defined memory regions */
#define IVSHMEM_SHM_REGIONS \
{ \
.name = IVSHMEM_SHM_REGION_0,\
.size = 0x200000UL, /* 2MB */\
.name = IVSHMEM_SHM_REGION_0, \
.size = 0x200000UL, /* 2M */ \
},
#endif /* IVSHMEM_CFG_H */

2
misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/pci_dev.c
View File

@ -10,7 +10,7 @@
#include <vbar_base.h>
#include <mmu.h>
#include <page.h>
#include <ivshmem.h>
#include <ivshmem_cfg.h>
/*
* TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for

13
misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/ivshmem_cfg.h
View File

@ -8,7 +8,8 @@
#include <ivshmem.h>
#include <pgtable.h>
#include <pci_devices.h>
#define IVSHMEM_SHM_REGION_0 "hv:/shm_region_0"
/*
* The IVSHMEM_SHM_SIZE is the sum of all memory regions.
@ -18,12 +19,10 @@
#define IVSHMEM_DEV_NUM 2UL
/* All user defined memory regions */
struct ivshmem_shm_region mem_regions[] = {
{
.name = IVSHMEM_SHM_REGION_0,
.size = 0x200000UL, /* 2M */
#define IVSHMEM_SHM_REGIONS \
{ \
.name = IVSHMEM_SHM_REGION_0, \
.size = 0x200000UL, /* 2M */ \
},
};
#endif /* IVSHMEM_CFG_H */

2
misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/pci_dev.c
View File

@ -10,7 +10,7 @@
#include <vbar_base.h>
#include <mmu.h>
#include <page.h>
#include <ivshmem.h>
#include <ivshmem_cfg.h>
/*
* TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for

79
misc/vm_configs/scenarios/industry/vm_configurations.c
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@ -78,4 +78,83 @@ struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
.t_vuart.vuart_id = 1U,
},
},
{ /* VM3 */
CONFIG_POST_STD_VM(2),
#ifdef CONFIG_RDT_ENABLED
.clos = VM3_VCPU_CLOS,
#endif
.cpu_affinity = VM3_CONFIG_CPU_AFFINITY,
.vuart[0] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = COM1_BASE,
.irq = COM1_IRQ,
},
.vuart[1] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = INVALID_COM_BASE,
},
},
{ /* VM4 */
CONFIG_POST_STD_VM(3),
#ifdef CONFIG_RDT_ENABLED
.clos = VM4_VCPU_CLOS,
#endif
.cpu_affinity = VM4_CONFIG_CPU_AFFINITY,
.vuart[0] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = COM1_BASE,
.irq = COM1_IRQ,
},
.vuart[1] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = INVALID_COM_BASE,
},
},
{ /* VM5 */
CONFIG_POST_STD_VM(4),
#ifdef CONFIG_RDT_ENABLED
.clos = VM5_VCPU_CLOS,
#endif
.cpu_affinity = VM5_CONFIG_CPU_AFFINITY,
.vuart[0] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = COM1_BASE,
.irq = COM1_IRQ,
},
.vuart[1] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = INVALID_COM_BASE,
},
},
{ /* VM6 */
CONFIG_POST_STD_VM(5),
#ifdef CONFIG_RDT_ENABLED
.clos = VM6_VCPU_CLOS,
#endif
.cpu_affinity = VM6_CONFIG_CPU_AFFINITY,
.vuart[0] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = COM1_BASE,
.irq = COM1_IRQ,
},
.vuart[1] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = INVALID_COM_BASE,
},
},
{ /* VM7 */
CONFIG_KATA_VM(1),
#ifdef CONFIG_RDT_ENABLED
.clos = VM7_VCPU_CLOS,
#endif
.cpu_affinity = VM7_CONFIG_CPU_AFFINITY,
.vuart[0] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = INVALID_COM_BASE,
},
.vuart[1] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = INVALID_COM_BASE,
},
},
};

4
misc/vm_configs/scenarios/industry/vm_configurations.h
View File

@ -15,8 +15,8 @@
*/
#define PRE_VM_NUM 0U
#define SOS_VM_NUM 1U
#define MAX_POST_VM_NUM 2U
#define CONFIG_MAX_KATA_VM_NUM 0U
#define MAX_POST_VM_NUM 7U
#define CONFIG_MAX_KATA_VM_NUM 1U
/* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */
#define DM_OWNED_GUEST_FLAG_MASK (GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \