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dm:reserve 64M hole for graphics stolen memory in e820 table

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Add 64M@0xDB000000 for GVT-d usage as below.
Currently, use 64M for graphics stolen memory,
gop driver and uos IGD driver will use this memory region.

start 	      end          size     Note
[0x 00000000, 0x 000A0000] 640K
[0x 000A0000, 0x 00100000] 384K
[0x 00100000, 0x 7ff00000] 2G-1M    lowmem-1M
[0x 80000000, 0x 88000000] 128M     [lowmem, +128M]
[0x DB000000, 0x DF000000] 64MB     graphics stolen memory for GVT-d
[0x DF000000, 0x E0000000] 16M 	    gvt
[0x e0000000, 0x100000000] 512M
[0x100000000, 0x140000000] 1G

Tracked-On: #4360

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
This commit is contained in:
Junming Liu 2020-01-10 21:34:48 +00:00 committed by wenlingz
parent 10c407cc85
commit f9f64d356f
2 changed files with 20 additions and 6 deletions
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22
devicemodel/core/sw_load_common.c
View File

@ -56,10 +56,11 @@ static char bootargs[BOOT_ARG_LEN];
* 2: 0x100000 - lowmem RAM lowmem - 1MB
* 3: lowmem - 0x80000000 (reserved) 2GB - lowmem
* 4: 0x80000000 - 0x88000000 (reserved) 128MB
* 5: 0xDF000000 - 0xE0000000 (reserved) 16MB
* 6: 0xE0000000 - 0x100000000 MCFG, MMIO 512MB
* 7: 0x100000000 - 0x140000000 64-bit PCI hole 1GB
* 8: 0x140000000 - highmem RAM highmem - 5GB
* 5: 0xDB000000 - 0xDF000000 (reserved) 64MB
* 6: 0xDF000000 - 0xE0000000 (reserved) 16MB
* 7: 0xE0000000 - 0x100000000 MCFG, MMIO 512MB
* 8: 0x100000000 - 0x140000000 64-bit PCI hole 1GB
* 9: 0x140000000 - highmem RAM highmem - 5GB
*/
const struct e820_entry e820_default_entries[NUM_E820_ENTRIES] = {
{ /* 0 to video memory */
@ -93,6 +94,19 @@ const struct e820_entry e820_default_entries[NUM_E820_ENTRIES] = {
.type = E820_TYPE_RESERVED
},
{
/* reserve for GVT-d graphics stolen memory.
* The native BIOS allocates the stolen memory by itself,
* and size can be configured by user itself through BIOS GUI.
* For ACRN, we simply hard code to 64MB and static
* reserved the memory region to avoid more efforts in OVMF,
* and user *must* align the native BIOS setting to 64MB.
*/
.baseaddr = 0xDB000000,
.length = 0x4000000,
.type = E820_TYPE_RESERVED
},
{
/* reserve for GVT */
.baseaddr = 0xDF000000,

4
devicemodel/include/sw_load.h
View File

@ -39,9 +39,9 @@
#define E820_TYPE_ACPI_NVS 4U /* EFI 10 */
#define E820_TYPE_UNUSABLE 5U /* EFI 8 */
#define NUM_E820_ENTRIES 9
#define NUM_E820_ENTRIES 10
#define LOWRAM_E820_ENTRY 2
#define HIGHRAM_E820_ENTRY 8
#define HIGHRAM_E820_ENTRY 9
/* Defines a single entry in an E820 memory map. */
struct e820_entry {