From fde2c07c0a98cfe9bacf2190d56a2cc9f436efe7 Mon Sep 17 00:00:00 2001 From: "Li, Fei1" Date: Mon, 18 Mar 2019 19:50:46 +0800 Subject: [PATCH] hv: vlapic: minor fix about APICv inject interrupt When VID is enabeld, we should always inejct the pending interrupts when vm enter. Tracked-On: #1842 Signed-off-by: Li, Fei1 --- hypervisor/arch/x86/guest/virq.c | 38 ++++++++++++++++---------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/hypervisor/arch/x86/guest/virq.c b/hypervisor/arch/x86/guest/virq.c index 47ec2db93..a408abac9 100644 --- a/hypervisor/arch/x86/guest/virq.c +++ b/hypervisor/arch/x86/guest/virq.c @@ -468,25 +468,6 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu) arch->inject_event_pending = false; } else { - /* - * From SDM Vol3 26.3.2.5: - * Once the virtual interrupt is recognized, it will be delivered - * in VMX non-root operation immediately after VM entry(including - * any specified event injection) completes. - * - * So the hardware can handle vmcs event injection and - * evaluation/delivery of apicv virtual interrupts in one time - * vm-entry. - * - * Here to sync the pending interrupts to irr and update rvi if - * needed. And then try to handle vmcs event injection. - */ - if (is_apicv_advanced_feature_supported() && - bitmap_test_and_clear_lock(ACRN_REQUEST_EVENT, pending_req_bits)) { - vlapic = vcpu_vlapic(vcpu); - vlapic_apicv_inject_pir(vlapic); - } - /* SDM Vol 3 - table 6-2, inject high priority exception before * maskable hardware interrupt */ if (vcpu_inject_hi_exception(vcpu) == 0) { @@ -501,6 +482,25 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu) } } + /* + * From SDM Vol3 26.3.2.5: + * Once the virtual interrupt is recognized, it will be delivered + * in VMX non-root operation immediately after VM entry(including + * any specified event injection) completes. + * + * So the hardware can handle vmcs event injection and + * evaluation/delivery of apicv virtual interrupts in one time + * vm-entry. + * + * Here to sync the pending interrupts to irr and update rvi if + * needed. And then try to handle vmcs event injection. + */ + if (is_apicv_advanced_feature_supported() && + bitmap_test_and_clear_lock(ACRN_REQUEST_EVENT, pending_req_bits)) { + vlapic = vcpu_vlapic(vcpu); + vlapic_apicv_inject_pir(vlapic); + } + /* * If "virtual-interrupt delivered" is enabled, CPU will evaluate * and automatic inject the virtual interrupts in appropriate time.