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https://github.com/projectacrn/acrn-hypervisor.git
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hv: debug: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule. Reduce the count of the "return entries". Fix the violations which is comply with the cases list below: 1.Function has 2 return entries. 2.The first return entry is used to return the error code of checking variable whether is valid. Fix the violations in "if else" format. Tracked-On: #861 Signed-off-by: Huihuang Shi <huihuang.shi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Huihuang Shi
wenlingz
parent
414860fb89
commit
fe3de67906
@ -170,48 +170,46 @@ static void profiling_disable_pmu(void)
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dev_dbg(ACRN_DBG_PROFILING, "%s: entering cpu%d",
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__func__, get_cpu_id());
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if (ss == NULL) {
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dev_dbg(ACRN_ERR_PROFILING, "%s: exiting cpu%d",
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__func__, get_cpu_id());
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return;
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}
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if (ss != NULL) {
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if (ss->vmexit_msr_cnt == 1) {
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/* Set the VM Exit MSR Load in VMCS */
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exec_vmwrite(VMX_EXIT_MSR_LOAD_COUNT, 0x0U);
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exec_vmwrite64(VMX_GUEST_IA32_DEBUGCTL_FULL,
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ss->saved_debugctl_value);
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if (ss->vmexit_msr_cnt == 1) {
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/* Set the VM Exit MSR Load in VMCS */
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exec_vmwrite(VMX_EXIT_MSR_LOAD_COUNT, 0x0U);
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exec_vmwrite64(VMX_GUEST_IA32_DEBUGCTL_FULL,
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ss->saved_debugctl_value);
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ss->vmexit_msr_cnt = 0;
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}
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ss->vmexit_msr_cnt = 0;
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}
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group_id = ss->current_pmi_group_id;
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for (i = 0U; i < MAX_MSR_LIST_NUM; i++) {
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msrop = &(ss->pmi_stop_msr_list[group_id][i]);
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if (msrop != NULL) {
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if (msrop->msr_id == (uint32_t)-1) {
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break;
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}
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if (msrop->msr_op_type == (uint8_t)MSR_OP_WRITE) {
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msr_write(msrop->msr_id, msrop->value);
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dev_dbg(ACRN_DBG_PROFILING,
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"%s: MSRWRITE cpu%d, msr_id=0x%x, msr_val=0x%llx",
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__func__, get_cpu_id(), msrop->msr_id, msrop->value);
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group_id = ss->current_pmi_group_id;
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for (i = 0U; i < MAX_MSR_LIST_NUM; i++) {
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msrop = &(ss->pmi_stop_msr_list[group_id][i]);
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if (msrop != NULL) {
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if (msrop->msr_id == (uint32_t)-1) {
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break;
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}
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if (msrop->msr_op_type == (uint8_t)MSR_OP_WRITE) {
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msr_write(msrop->msr_id, msrop->value);
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dev_dbg(ACRN_DBG_PROFILING,
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"%s: MSRWRITE cpu%d, msr_id=0x%x, msr_val=0x%llx",
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__func__, get_cpu_id(), msrop->msr_id, msrop->value);
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}
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}
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}
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/* Mask LAPIC LVT entry for PMC register */
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lvt_perf_ctr = (uint32_t) msr_read(MSR_IA32_EXT_APIC_LVT_PMI);
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lvt_perf_ctr |= LVT_PERFCTR_BIT_MASK;
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msr_write(MSR_IA32_EXT_APIC_LVT_PMI, lvt_perf_ctr);
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ss->pmu_state = PMU_SETUP;
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dev_dbg(ACRN_DBG_PROFILING, "%s: exiting cpu%d",
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__func__, get_cpu_id());
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} else {
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dev_dbg(ACRN_ERR_PROFILING, "%s: exiting cpu%d",
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__func__, get_cpu_id());
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}
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/* Mask LAPIC LVT entry for PMC register */
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lvt_perf_ctr = (uint32_t) msr_read(MSR_IA32_EXT_APIC_LVT_PMI);
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lvt_perf_ctr |= LVT_PERFCTR_BIT_MASK;
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msr_write(MSR_IA32_EXT_APIC_LVT_PMI, lvt_perf_ctr);
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ss->pmu_state = PMU_SETUP;
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dev_dbg(ACRN_DBG_PROFILING, "%s: exiting cpu%d",
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__func__, get_cpu_id());
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}
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/*
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@ -759,48 +757,47 @@ void profiling_stop_pmu(void)
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dev_dbg(ACRN_DBG_PROFILING, "%s: entering", __func__);
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if (!in_pmu_profiling) {
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return;
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}
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if (in_pmu_profiling) {
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for (i = 0U; i < phys_cpu_num; i++) {
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per_cpu(profiling_info.ipi_cmd, i) = IPI_PMU_STOP;
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if (per_cpu(profiling_info.sep_state, i).pmu_state == PMU_RUNNING) {
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per_cpu(profiling_info.sep_state, i).pmu_state = PMU_SETUP;
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}
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for (i = 0U; i < phys_cpu_num; i++) {
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per_cpu(profiling_info.ipi_cmd, i) = IPI_PMU_STOP;
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if (per_cpu(profiling_info.sep_state, i).pmu_state == PMU_RUNNING) {
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per_cpu(profiling_info.sep_state, i).pmu_state = PMU_SETUP;
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dev_dbg(ACRN_DBG_PROFILING,
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"%s: pmi_cnt[%d] = total:%u valid=%u, vmexit_cnt=%u",
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__func__, i, per_cpu(profiling_info.sep_state, i).total_pmi_count,
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per_cpu(profiling_info.sep_state, i).valid_pmi_count,
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per_cpu(profiling_info.sep_state, i).total_vmexit_count);
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dev_dbg(ACRN_DBG_PROFILING,
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"%s: cpu%d frozen well:%u frozen delayed=%u, nofrozen_pmi=%u",
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__func__, i, per_cpu(profiling_info.sep_state, i).frozen_well,
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per_cpu(profiling_info.sep_state, i).frozen_delayed,
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per_cpu(profiling_info.sep_state, i).nofrozen_pmi);
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dev_dbg(ACRN_DBG_PROFILING,
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"%s: cpu%d samples captured:%u samples dropped=%u",
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__func__, i, per_cpu(profiling_info.sep_state, i).samples_logged,
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per_cpu(profiling_info.sep_state, i).samples_dropped);
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per_cpu(profiling_info.sep_state, i).samples_logged = 0U;
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per_cpu(profiling_info.sep_state, i).samples_dropped = 0U;
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per_cpu(profiling_info.sep_state, i).valid_pmi_count = 0U;
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per_cpu(profiling_info.sep_state, i).total_pmi_count = 0U;
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per_cpu(profiling_info.sep_state, i).total_vmexit_count = 0U;
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per_cpu(profiling_info.sep_state, i).frozen_well = 0U;
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per_cpu(profiling_info.sep_state, i).frozen_delayed = 0U;
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per_cpu(profiling_info.sep_state, i).nofrozen_pmi = 0U;
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}
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dev_dbg(ACRN_DBG_PROFILING,
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"%s: pmi_cnt[%d] = total:%u valid=%u, vmexit_cnt=%u",
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__func__, i, per_cpu(profiling_info.sep_state, i).total_pmi_count,
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per_cpu(profiling_info.sep_state, i).valid_pmi_count,
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per_cpu(profiling_info.sep_state, i).total_vmexit_count);
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smp_call_function(pcpu_active_bitmap, profiling_ipi_handler, NULL);
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dev_dbg(ACRN_DBG_PROFILING,
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"%s: cpu%d frozen well:%u frozen delayed=%u, nofrozen_pmi=%u",
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__func__, i, per_cpu(profiling_info.sep_state, i).frozen_well,
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per_cpu(profiling_info.sep_state, i).frozen_delayed,
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per_cpu(profiling_info.sep_state, i).nofrozen_pmi);
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in_pmu_profiling = false;
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dev_dbg(ACRN_DBG_PROFILING,
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"%s: cpu%d samples captured:%u samples dropped=%u",
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__func__, i, per_cpu(profiling_info.sep_state, i).samples_logged,
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per_cpu(profiling_info.sep_state, i).samples_dropped);
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per_cpu(profiling_info.sep_state, i).samples_logged = 0U;
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per_cpu(profiling_info.sep_state, i).samples_dropped = 0U;
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per_cpu(profiling_info.sep_state, i).valid_pmi_count = 0U;
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per_cpu(profiling_info.sep_state, i).total_pmi_count = 0U;
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per_cpu(profiling_info.sep_state, i).total_vmexit_count = 0U;
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per_cpu(profiling_info.sep_state, i).frozen_well = 0U;
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per_cpu(profiling_info.sep_state, i).frozen_delayed = 0U;
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per_cpu(profiling_info.sep_state, i).nofrozen_pmi = 0U;
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dev_dbg(ACRN_DBG_PROFILING, "%s: done.", __func__);
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}
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smp_call_function(pcpu_active_bitmap, profiling_ipi_handler, NULL);
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in_pmu_profiling = false;
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dev_dbg(ACRN_DBG_PROFILING, "%s: done.", __func__);
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}
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