Commit Graph

117 Commits

Author SHA1 Message Date
Shiqing Gao
bcaede0c0e hv: treewide: fix 'Use of function like macro'
- convert function like macros to inline functions based on MISRA-C
  requirement
- remove some unused and duplicated macros

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-11 10:49:48 +08:00
Shiqing Gao
4360235edf hv: treewide: fix 'Macro parameter not in brackets'
Add the brackets for Macro parameter to avoid the unintentional
mistakes.

A simple example that may cause mistakes:
        #define minus(x) -x
When the following call is made,
        z = minus(a-b)
it becomes:
        z = -a-b;
where "-a - b" is equivalent to "(-a) - b" rather than "- (a - b)", as
expected.

v2 -> v3:
 * convert DMAR_WAIT_COMPLETION to inline function
 * remove the macro PIC_PIN_FOREACH and implement the well-formed
   for loop in each case
 * replace __CPP_STRING with STRINGIFY and remove the unused CPP_STRING

v1 -> v2:
 * Remove some changes to function like macro since MISRA-C requires to
   use inline functions if it is possible.
   These MACRO brackets violations will be fixed together when fixing
   other issues related to function like macro.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-09-07 10:22:00 +08:00
Chen, Gang G
8d35f4e0e8 HV: wrap and enable hkdf_sha256 key derivation based on mbedtls
Derive multiple seeds to support multiple guest VMs

Signed-off-by: Chen, Gang G <gang.g.chen@intel.com>
2018-08-27 09:39:05 +08:00
Shiqing Gao
7a4dcfcc1a hv: treewide: fix 'Function prototype/defn param type mismatch'
Fix the parameter type mismatch between API declaration and definition.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-21 09:55:12 +08:00
Li, Fei1
709cd5749e hv: lib: add ffz64_ex
Add ffz64_ex to find the first zero bit in a uint64_t array.
Note: the API is lockless.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-08-17 14:27:12 +08:00
Yonghua Huang
d030595194 HV: remove 'spinlock_rfags' declaration
- remove the global declaration of 'cpu_int_value'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-16 09:43:04 +08:00
Junjun Shan
ca83c09b9f hv: treewide: fix multiple MISRAC violations
MISARC has requirements about  Marco redefinition, usage of ++ or -- and
assignment operator in boolean expression. This patch is used to solve
these violations.

The modifications are summarized as following:
1.The HC_VM_SET_MEMORY_REGION, HC_VM_GPA2HPA, HC_VM_SET_MEMORY_REGIONS are
redefined twice in acrn_hv_des.h, so delete them to solve the macro
redefinition violations.

2.The macro BUS_LOCK are redefined in bits.h and atomic.h, then delete
the declaration in both two files, add a new declaration in cpu.h and
include the header file.

3.modify the code to solve the improper usage of -- operators in string.c.

4.modify the while loop to for loop to avoid assignment operator in
boolean expression in vlapic.c.

v1 -> v2:
 *Modify the format of commit logs and signed-off name.

 *Modify the code format from 'd = d-1;' to 'd--;' to be better.

Signed-off-by: Junjun Shan <junjun.shan@intel.com>
2018-08-15 11:21:09 +08:00
Shiqing Gao
b4a2ff5022 hv: treewide: fix 'Prototype and definition name mismatch'
Fix the parameter name mismatch between API declaration and definition.

v2 -> v3:
 * Fix two more violations which are missed in previous report.
   shell_puts and console_write

v1 -> v2:
 * Replace 'ret_desc' with 'desc'

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-06 16:04:40 +08:00
Xiangyang Wu
77c3917544 HV:treewide:avoid using multiple # or ## in a macro
In the C99 standard, the order of evaluation associated with
multiple #, multiple ## or a mix of # and ## preprocessor
operator is unspecified. For this case, gcc 7.3.0 manual
does not specify related implementation. So it is unsafe
to use multiple # or ## in a macro.
BTW, there are some macros with one or more "##" which are
not used by hypervisor.

Update relate codes to avoid using multiple # or ## in a macro;
Remove unused macros with one or more "##";
Remove "struct __hack;" at the end of GETCC since it is useless.

Note:
     '##' operator usage constraints: A ## preprocessing token shall
     not occur at the beginning or at the end of a replacement list
     for either form of macro definition.
V1--V2:
	Update relate codes to avoid using multiple # or ## in a macro.
V2-->V3:
	Remove unused macros with one or more "##";
	Remove "struct __hack;" at the end of GETCC since it is useless.

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-02 13:10:16 +08:00
Arindam Roy
a2fe964de8 HV: Rename functions beginning with "_"
V1:
In order to remove MISRA C violations for rule
219S, rename functions, macros whose name
starts with "_".
Also removed some __mmio functions because they are
duplicates and are not used anywhere.
Renamed functions like __assert, to asm_assert,
because they were only wrappers around asm calls.

V2:
Over and above the changes on V1, modified bitmap
functions names to lock (corresponding to unlock)
introduced in V1

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-30 10:11:54 +08:00
Huihuang Shi
496e40072e HV:treewide:fix rest of violations related parameter changed
Misra c required parameter should not changed in the scope
of function,use local variable to replace it.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-27 16:42:19 +08:00
Huihuang Shi
59771ff461 HV:treewide:fix "Reference parameter to procedure is reassigned"
Parameter's type which is pointer should not be changed in the
scope of function,assign it's value to local variable to fixed
it out.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 12:17:12 +08:00
Qi Yadong
1b527e52a3 HV: parse seed through cmdline during boot stage
1. Add strstr_s in lib to support locate substring in a string
2. Parse "ImageBootParamsAddr=" from cmdline and retrieve seed
3. Convert the addresses to SOS GPA since they will be used in
   SOS.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Reviewed-by: Wang Kai <kai.z.wang@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 11:27:46 +08:00
Minggui Cao
10ed599b50 HV: cleanup sprintf&string.c MISRA-C issues
main focus on integral issues, and change some functions
interface to unify the params data type; also modify to
simplify the code logic.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 10:50:54 +08:00
Huihuang Shi
5189bcd272 HV:treewide:fix "Attempt to change parameter passed by value"
In the function scope,the parameter should not be
changed as Misra required.
V1->V2 recover some violations because of ldra's false positive.
V2->V3 sync local variable' type to parameter's type with the prefix of const.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-26 09:35:52 +08:00
Yang, Yu-chu
da0f28c6de HV: Bracket for the same level of precendence
The plus and minor have the same level of precedence. The Misra-C
considers it as a violation. Added brackets in between addition and
substraction oprators.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-24 10:10:39 +08:00
Yang, Yu-chu
91337da5a1 HV: logical and high level precedence expression needs brackets
Added brackets for expression to make it easy to understand and
reduce the mistake of precedence. The rule is applied to the
mixed same level of prevedence opeartors, high level presedence
operators and logical expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-24 10:10:39 +08:00
Minggui Cao
23a5c74ac7 HV: handle integral issues as MISRA-C report
mainly focus on: like U/UL as unsigned suffix;
char and int mix usage; also change some function's params
for data type consistent.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-20 10:39:46 +08:00
Shiqing Gao
0252ae9e11 hv: treewide: fix 'No definition in system for prototyped procedure'
- Remove those APIs without definition

- Minor changes to make sure the line length is less than 80

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-20 10:38:32 +08:00
Xiangyang Wu
d28fff2b06 HV:treewide:Update the type of return value and parameters of atomic operations
There are many type conversions in the atomic
operations invoking reported by static analysis tool. These
type conversions voilate MISRA C.

To keep uniform naming convention, rename atomic operation
function names:
atomic_set_int/long --> atomic_set32/64;
atomic_clear_int/long --> atomic_clear32/64;
atomic_load --> atomic_load32;
atomic_store --> atomic_store32;
atomic_swap --> atomic_swap32;
atomic_readandclear --> atomic_readandclear32;
atomic_inc --> atomic_inc32;
atomic_dec --> atomic_dec32;
atomic_cmpxchg --> atomic_cmpxchg32;
atomic_xadd --> atomic_xadd32.
Update the type of atomic_load32/64, atomic_store32/64,
atomic_swap32/64, atomic_cmpxchg32/6.
Update related variables and callers.

Note: the type of return value and parameters of atomic_xadd32/64
still keep signed int/long since caller pass
negative variable to atomic_xadd32/64;

V1-->V2:
	Add comments for atomic_set/clear to differ from
	bitmap_set/clear.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie.Mao <junjie.mao@intel.com>
2018-07-19 14:39:47 +08:00
Minggui Cao
2f2d108b1e HV: handle integral issue report by MISRA-C
The main focus on: constant suffix U/UL; parameters cast like
uint32 to a uint16 variable; unify some APIs interface,
consist with the callers.

also modify some places to unify code style

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-07-16 16:24:29 +08:00
Arindam Roy
af806a93bd HV: Fix missing brackets for MISRA C Violations
Patch 6 of 7.
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Xiangyang Wu
4dc39fdb8e HV:treewide:Add 16-bit atomic operations and update vpid type
There are some integer type conversions reported by static
analysis tool for vcpu id, number of created vcpus, and
vpid, to reduce these type conversions, redesign vcpu id,
number of created vcpus, and vpid type as uint16_t as per
their usage, related 16-bit atomic operations shall be
added in HV.
MISRA C requires that all unsigned constants should have the suffix 'U'
(e.g. 0xffU), but the assembler may not accept such C-style constants.

Add 16-bit atomic add/dec/store operations;
Update temporary variables type and parameters type of
related caller;
Update vpid type as uint16_t;
Replace Macro with constant value for CPU_PAGE_SIZE.

Note: According to SDM A.10, there are some bits defined
in the IA32_VMX_EPT_VPID_CAP MSR to support the INVVPID
instruction, these bits don't mean actual VPID, so
the vpid field in the data struct vmx_capability doesn't
be updated.

V1--V2:
	update comments for assembly code as per coding style;

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-11 21:27:08 +08:00
Xiangyang Wu
f81fcf2f07 HV:MM:add 'U/UL' suffix for unsigned contant value
In the current memory module, there are many constatn value
without U/UL suffix, it is reported as MISRA C violations by
static analysis tool.

Add 'U/UL' suffix for unsigned contant value in memory module
as needed.

Note:In the most case, CPU_PAGE_SIZE(0x1000) is used as
unsigned integer contant value, so CPU_PAGE_SIZE is defined
as unsigned integer contant value, and it is safety converted
into unsigned long type according to MISRA C standard.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-11 09:23:03 +08:00
Junjie Mao
abe5cb4afe HV: include: integral type cleanup
This patch cleans up the integral type violations to MISRA C rules, mostly
related to signed constants that should be unsigned but also spelling out two
integer narrowing and dropping some macros negating unsigned integers.

v1 -> v2:

    * Drop INT_ROUNDUPx macros since they are never used.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 13:10:10 +08:00
Yin Fengwei
fdd785d669 hv: Add 32bit bitmap bit ops API
We need bitmap bit ops API for 32bit operators like vlapic irr
registers.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 10:01:15 +08:00
Huihuang Shi
ac7ba6c47f HV:lib:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Xiangyang Wu
50f06cad55 HV:treewide: Rename bit operation function fls as fls32
Rename bit operation function fls as fls32, keep name
style with other bit operation function.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 17:12:54 +08:00
Junjie Mao
e75cca64c8 HV: timer: keep TSC frequency in KHz
This patch represents TSC freqeuency in KHz using a 32-bit unsigned integer.

The conversion macros between ticks and us/ms are changed to inline functions to
enforce the types of the input parameters. Note that us_to_ticks accepts only
uint32_t (~4K us at most) and never overflows.

Results of some unit tests on the conversion functions:

    calibrate_tsc, tsc_khz=1881600
    64us -> ticks: 120422
    64us -> ticks -> us: 63
    511us -> ticks: 961497
    511us -> ticks -> us: 510
    1280000 ticks -> us: 680
    1280000 ticks -> us -> ticks: 1279488

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 10:18:06 +08:00
Junjie Mao
ffc0b27db4 HV: lib: make the argument to udelay unsigned
The parameter to udelay is the microseconds to wait for, which should be an
unsigned integer.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 10:18:06 +08:00
Xiangyang Wu
a97593e7db HV:treewide:Update return type of function ffs64 and ffz64
To reduce type conversion in HV:
Update return type of function ffs64 and ffz64 as uint16;
For ffs64, when the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call ffs64 or ffz64;

Note: In the allocate_mem, there is no return value checking for
calling ffz64, this will be updated latter.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER
        Coding style fixing;
        INVALID_CPU_ID instead of INVALID_PCPU_ID or INVALID_VCPU_ID;
        "%hu" is used to print vcpu id (uint16_t);
        Add "U/UL" for constant value as needed.
V2-->V3:
        ffs64 return INVALID_BIT_INDEX directly when
        the input value is zero;
        Remove excess "%hu" updates.
V3-->V4:
        Clean up the comments of ffs64;
        Add "U" for constant value as needed.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00
Xiangyang Wu
db01efa047 HV:treewide:Update return type for function fls64 and clz64
Change the return type of function fls64 and clz64 as uint16_t;
When the input is zero, INVALID_ID_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls64 or clz64;
When input value is zero, clz64 returns 64 directly.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER;
        Partly revert apicv_pending_intr udpates;
        Add type conversion as needed;
        Coding style fixing.
V2-->V3:
        Correct type conversion;
        fls64 return INVALID_BIT_INDEX directly when
        the input value is zero.
V3-->V4:
        No updates for this part in PATCH V4.

Note: For instruction "bsrq", destination register value
      is undefined when source register value is zero.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00
Xiangyang Wu
13d354e7a6 HV:treewide:Update return type for bit operations fls and clz
Change the return type of function fls and clz as uint16_t;
When the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls or clz;
When input value is zero, clz returns 32 directly.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER;
        Add type conversion as needed;
        Add "U/UL" for constant value as needed;
        Codeing style fixing.
V2-->V3:
       Use type conversion to remove side effect of
       the variable which stores fls/clz return value;
       fls return INVALID_BIT_INDEX directly when the
       input value is zero.
V3-->v4:
       Clean up comments for fls.

Note: For instruction "bsrl", destination register value
      is undefined when source register value is zero.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00
Xiangyang Wu
cc50165018 HV:treewide:Cleanup the type for parameters of bitmap
operations

For reducing sign conversion in hypervisor:
Update parameters of bitmap operations as unsigned type;
Update the input of related caller as unsigned type when the
caller's input parameter is const variable or the variable is
only used by bitmap operations.

V1-->V2:
        (1) Explicit casting for the first parameter
            of all bitmap operations;
        (2) Remove mask operation for explicit casting
            of all bitmap operations, since masking is
            useless. Otherwise, this trucation is dangerous.
V2-->V3:
        (1) Explicit casting for all bitmap operations parameter;
        (2) Masking bit offset with 6-bit;
        (3) Add few comments about bit offset.
V3-->V4:
        add '\' for some statement of bitmap macro

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 10:46:11 +08:00
Yonghua Huang
bbdb204750 HV:- Refine strtol() & strtoul()
- replace 'strtol()' with 'strtol_deci()'
    -- supports string with decimal format

 - replace 'strtoul()' with 'strtoul_hex()'
    -- support string with hex format

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 15:47:07 +08:00
Yonghua Huang
a27bfcefed HV: Remove 'register' prefix for data type
- it is unnecessary.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-06-29 00:50:01 +08:00
Huihuang Shi
9600dfa07d fix "function return type inconsistent"
MISRA C required function return type should be consistented.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Huihuang Shi
fe0314e8c3 HV:header:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Huihuang Shi
977c4b20b5 fix parted of "missing for discarded return value"
MISRA C required that return value should be used, missing for it should
add "(void)" prefix before the function call.
Some function can be declared without return value to avoid this problem.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 16:21:45 +08:00
Zheng, Gen
8f3b36b224 HV: add volatile declaration to pointer parameter
Add a volatile declaration to pointer parameter to avoid compiler
to optimize it by using old value saved in register instead of
accessing system memory.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-14 13:41:12 +08:00
Mingqiang Chi
5e2c83f395 hv:replace unsigned long long with uint64_t
unsigned long long--> uint64_t
long long --> int64_t

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-06-12 10:21:19 +08:00
Huihuang Shi
8940c896be fix MISRA C"Literal zero used in pointer context"
MISRC C required pointer to zero should be replace with NULL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-06-11 12:13:43 +08:00
David B. Kinder
f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Li, Fei1
c2ee561c02 hv: define errno more general
Hypercall will return errno to SOS (Now is linux kernel).
Let's define this more general.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 11:27:22 +08:00
huihuang.shi
1a5370a253 fix "warning:redefinition of typedef 'uint32_t'"
uint32_t occures two times in hypervisor/include/lib/types.h,
remove one of them.
Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-30 13:52:52 +08:00
Jason Chen CJ
44af2690f6 add triple fault request support
if vcpu meet triple fault, the vcpu should exit.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Zide Chen
8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Li, Fei1
34445008c2 hv: add non-lock bitmap operation
Add __bitmap_set/clear,
__bitmap_test_and_set/clear.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 09:42:03 +08:00
Li, Fei1
efb60e2726 hv: refine bit scan API
Rename
bsrl to bsr
bsrq to bsr64
bitmap_ffs to fls64
get_first_zero_bit to ffz64

Remove
ffsl

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-25 09:42:03 +08:00
Li, Fei1
57d0bf3b7c hv: refine bitops
Rename bitmap_clr to bitmap_clear
Rename bitmap_isset to bitmap_test
Remove bitmap_setof

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 09:42:03 +08:00
Li, Fei1
edb26a7e17 hv: refine the left atomic operation
rename atomic_cmpxchg_int to atomic_cmpxchg
replace atomic_cmpset_long with atomic_cmpxchg64
rename atomic_readandclear_long to atomic_readandclear64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
1f3da93e74 hv: refine atomic_load/store_xxx name
rename atomic_load/store_xxx32 to atomic_load/store
rename atomic_load/store_xxx64 to atomic_load64/store64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
336a8883db hv: remove atomic_add/subtract API
add atomic_inc(64)/dec(64) API.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
fadaf14a94 hv: refine atomic_xadd
1. rename atomic_xadd_int to atomic_xadd, add atomic_xadd64.
2. add atomic_add/sbu64_return, atomic_inc/dec64_return.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
0a83cf462d hv: remove support atomic operation for char/short
From now on, only plan to support atomic operation for int/long.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
5e427f340e hv: lib: split atomic operation to atomic.h
split atomic related operation to file atomic.h

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Kaige Fu
497eadcb9a lib: Move all str ops functions to one src file
Move all string operations functions into a single
source code file, instead of the various source
code files that just implement a single or few
function.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-16 11:57:11 +08:00
Li, Fei1
dace32eca1 hv: timer: add calibrate tsc hz by cpuid 0x15
Get tsc hz by cpuid 0x15 if we supported, otherwise
calibrate tsc by pit timer.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:56 +08:00
Li, Fei1
ab97963088 hv: lib: add max()/min() API
Add max()/min() lib API

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:56 +08:00
Zhao Yakui
ec13f4e1f2 HV:Remove the "immediate" constraint for inline assembly in bits operation
The input operand for inline assembly is passed from the caller. And they
are not the immediate type. Instead the register should be used.
This also helps to reduce the compile error if the optimizatin is enabled.

Signed-off-by: Zhao Yakui<yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:56 +08:00
Yan, Like
c61559a336 hv: remove spinlock_irq_obtain/spinlock_irq_release
These APIs are not used, and not as safe as spinlock_irqsave_obtain/
spinlock_irqrestore_release.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:25:55 +08:00
Zheng, Gen
6b1782b360 refine: remove redundant data type definition
remove data defination of mmio_addr_t, vaddr_t, paddr_t,
and ioport_t.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:54 +08:00
Zheng, Gen
c8116fc7c9 spinlock: bug fix in spinlock code
Using ebx will truncate the high 32bit part of 64bit virtual address.
So using rbx instead of ebx.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
2018-05-15 17:25:27 +08:00
Junjie Mao
c01a236efb treewide: fix declarations of functions with empty parameter lists
According to C99:

    The empty list in a function declarator that is not part of a definition of
    that function specifies that no information about the number or types of the
    parameters is supplied.

This means gcc is happy with the following code, which is undesirable.

    void foo();    /* declaration with an empty parameter list */

    void bar() {
        foo();     /* OK */
        foo(1);    /* OK */
        foo(1, 2); /* OK */
    }

This patch fixes declarations of functions with empty parameter lists by adding
an unnamed parameter of type void, which is the standard way to specify that a
function has no parameters. The following coccinelle script is used.

    @@
    type T;
    identifier f;
    @@

    -T f();
    +T f(void);

New compilation errors are fixed accordingly.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:23 +08:00
Qi Yadong
8d67f292ef Rename TIME_MS_DELTA to CYCLES_PER_MS
TIME_MS_DELTA is not clear enough, rename it to CYCLES_PER_MS.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:39 +08:00
Li, Fei1
36148041bc Move s[n]printf to lib for release
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:37 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00