This patch fix some potential crash issues, like wild
pointers access, buffer overflow and etc.
Change-Id: Iddd8e1820da426adc6b9b4d9da9e44017d9f365c
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
With current implementation:
vm_init_vdevs only handles the negative error code, while passthru_init
returns positive error code when error occurs.
This causes unexpected dm crash since the real error is not being
handled properly.
What this patch does:
Change the error code to be negative value in passthru_init because it
is common in Linux kernel to return negative value when error occurs.
v2 -> v3
* add more comments about the reason to convert the return value
v1 -> v2:
* add a wrapper API to convert the error returned from pci_system_init
to the ERROR we defined in DM
* use the defined errno as the return value rather than -1
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
On SBL platform, UOS bsp always starts from realmode, which requires
the support of vSBL.
Boot kernel directly by -U option is no longer supported.
Remove -U option in launch script.
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The Intel Trace Hub (aka. North Peak, NPK) is a trace aggregator for
Software, Firmware, and Hardware. On the virtualization platform, it
can be used to output the traces from SOS/UOS/Hypervisor/FW together
with unified timestamps.
There are 2 software visible MMIO space in the npk pci device. One is
the CSR which maps the configuration registers, and the other is the
STMR which is organized as many Masters, and used to send the traces.
Each Master has a fixed number of Channels, which is 128 on GP. Each
channel occupies 64B, so the offset of each Master is 8K (64B*128).
Here is the detailed layout of STMR:
M=NPK_SW_MSTR_STP (1024 on GP)
+-------------------+
| m[M],c[C-1] |
Base(M,C-1) +-------------------+
| ... |
+-------------------+
| m[M],c[0] |
Base(M,0) +-------------------+
| ... |
+-------------------+
| m[i+1],c[1] |
Base(i+1,1) +-------------------+
| m[i+1],c[0] |
Base(i+1,0) +-------------------+
| ... |
+-------------------+
| m[i],c[1] |
Base(i,1)=SW_BAR+0x40 +-------------------+
| m[i],c[0] | 64B
Base(i,0)=SW_BAR +-------------------+
i=NPK_SW_MSTR_STRT (256 on GP)
CSR and STMR are treated differently in npk virtualization because:
1. CSR configuration should come from just one OS, instead of each OS.
In our case, it should come from SOS.
2. For performance and timing concern, the traces from each OS should
be written to STMR directly.
Based on these, the npk virtualization is implemented in this way:
1. The physical CSR is owned by SOS, and dm/npk emulates a software
one for the UOS, to keep the npk driver on UOS unchanged. Some CSR
initial values are configured to make the UOS npk driver think it
is working on a real npk. The CSR configuration from UOS is ignored
by dm, and it will not bring any side-effect. Because traces are the
only things needed from UOS, the location to send traces to and the
trace format are not affected by the CSR configuration.
2. Part of the physical STMR will be reserved for the SOS, and the
others will be passed through to the UOS, so that the UOS can write
the traces to the MMIO space directly.
A parameter is needed to indicate the offset and size of the Masters
to pass through to the UOS. For example, "-s 0:2,npk,512/256", there
are 256 Masters from #768 (256+512, #256 is the starting Master for
software tracing) passed through to the UOS.
CSR STMR
SOS: +--------------+ +----------------------------------+
| physical CSR | | Reserved for SOS | |
+--------------+ +----------------------------------+
UOS: +--------------+ +---------------+
| sw CSR by dm | | mapped to UOS |
+--------------+ +---------------+
Here is an overall flow about how it works.
1. System boots up, and the npk driver on SOS is loaded.
2. The dm is launched with parameters to enable npk virtualization.
3. The dm/npk sets up a bar for CSR, and some values are initialized
based on the parameters, for example, the total number of Masters for
the UOS.
4. The dm/npk sets up a bar for STMR, and maps part of the physical
STMR to it with an offset, according to the parameters.
5. The UOS boots up, and the native npk driver on the UOS is loaded.
6. Enable the traces from UOS, and the traces are written directly to
STMR, but not output by npk for now.
7. Enable the npk output on SOS, and now the traces are output by npk
to the selected target.
8. If the memory is the selected target, the traces can be retrieved
from memory on SOS, after stopping the traces.
Signed-off-by: Zhi Jin <zhi.jin@intel.com>
Reviewed-by: Zhang Di <di.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
When connecting three monitors to MRB, we will assign the first one to
SOS and assign remaining ones to UOS.
Signed-off-by: Min He <min.he@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Create a new diectory bios in devicemodel
Add vSBL binary in bios directory.
- VSBL.bin: release version of vSBL
- VSBL_debug.bin: debug version of vSBL
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jack Ren <jack.ren@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Now the IPU devices are always enabled. But they don't exist on some
boards. In such case some errors are warned and the system can't be booted.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Yin FengWei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Enable IOC for android on MRB by default.
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Like Yan <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
vsbl layout has been changed.
Previously, vsbl start from 64bit mode.
This patch changes the vsbl load code according to the
layout change of vSBL.
The new vsbl binary added reset vector support.
It will start from reset vector in real mode.
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
For the platform without virtual bootloader, dm will load uos kernel
directly, and hv will set rip according to uos kernel entry.
In current code, uos bsp starts from 64bit mode, so 64bit kernel entry
is used.
This patch series sets uos bsp to protected mode on such platform, so
32bit kernel entry is choosed.
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
To avoid PTY device symbol link failure due to non-exist directory passed from
parameter. Add check_dir function to check the directory and create it if not
exist.
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Fixes a recent PR #311 that added a new API but the doxygen comments for
one of the parameters didn't match the parameter name.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
* Add Fedora 28 and Ubuntu 18.04 Dockerfile
* Add new build dependencies (for the ACRN tools)
* Change default Fedora version to 28
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
This reverts commit 5b1c536eee.
For normal case, we connected two HDMI monitors, one for SOS, another for UOS.
Previously UOS has problem when only see one display, it was the bug of
user space driver, then to work around this issue, submit temp patch to let
UOS see two displays.
From latest info, after switch to use github latest user spce driver in stable
branch, such problem was resolved. Then we need revert previous workaround
patch, otherwise, UOS will show on both HDMI1 and HDMI2.
In virtio_heci struct there have deiniting/pending_reset/resetting
variables. All these variables represent the status of virtio heci devices.
Change them into one enum type variable for vheci status.
Signed-off-by: Long Liu <long.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch turn on WIFI/BT in launch_UOS.sh based on WIFI BDF on SBL,
which is different from ABL. Still need WIFI/BT driver in Android to
make WIFI/BT passthrough work.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
NHLT table is used by some audio driver for topology data, but current
default audio driver doens't depend on it. Disable it by default due
to possible boot failure with different SOS firmware.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
To send open channel command after opening CBC signal channel successfully.
For the latest IOC firmware, the IOC mediator needs to send open channel command
to activate CBC signal channel. Otherwise, there will be no any signal data will
be received.
The open channel command is forward compatible that it would not impact for
older IOC firmware.
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
This patch implements scalable xHCI parameter for extended capabilities.
For future supported platform, user can be easy to specify their
platform to emulate corresponding xHCI capabilities.
The new usage:
-s <n>,xhci,[bus1-port1,bus2-port2]:[tablet]:[log=x]:[cap=x]
The old usage:
-s <n>,xhci,[bus1-port1,bus2-port2]:[tablet]:[log=x]
Change-Id: Ie8ba056d57cac9446bcf3f39b342c7ac22245c61
Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
This patch implements Intel ApolloLake xHCI extended capabilities. It
includes two dual role switch registers for switching shared
USB2&USB3 phys between xHCI and xDCI.
Change-Id: I2533537d8a4224da3cf9b2e7475aab9f65347a4a
Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Some xHCI extended capabilities are writable. This patch adds the
writing function for excap.
Change-Id: Ie8b144b47ffa261f97d0461bf97b0c4d312a9333
Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Every platform should have their own xHCI specific extended
capabilities, but the current xHCI DM is not scalable for them. This
patch refines related logic to make it scalable.
Current code only support 4 registers(4*32) as basic extended
capabilites. Base on this new implementation, the mmio range from
excapoff to regsend will cover real excap size according to the cap
parameter.
Change-Id: Ic55a4494e090ec255939cdb8f32950e3c8a66082
Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
monitor_vm_ops and its helpers is added to allow DM to register operations
, so thant vm manager could trigger the power state changes of VM.
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Wang, Yu <yu1.wang@intel.com>
signed-off-by: Yan Like <like.yan@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Adapt dm-monitor and acrnctl to use the helper functions and new message
definitions in acrn_mngr.h.
These jobs must be done in one commit to avoid build problems:
1. message transmission and callback registration code are moved
to libacrn-mngr.a, so old functions in dm-monitor could be removed to
make code clean;
2. remove unnecessary monior_msg.h;
3. minor changes to acrnctl accordingly.
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Wang, Yu <yu1.wang@intel.com>
signed-off-by: Yan Like <like.yan@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
The VIRTIO_PCI_CAP_PCI_CFG capability creates an alternative access
method to the common configuration, notification, ISR and device-
specific configuration regions.
To access a device region, the driver writes into the capability
structure (ie. within the PCI configuration space) as follows:
- The driver sets the BAR to access by writing to cap.bar
- The driver sets the size of the access by writing 1, 2 or 4 to
cap.length
- The driver sets the offset within the BAR by writing to cap.offset
At that point, pci_cfg_data will provide a window of size cap.length
into the given cap.bar at offset cap.offset.
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
Virtio 1.0 introduced several PCIY_VENDOR capabilities. When trying to
write to these capabilities no action is taken so the registers in
the capability of VIRTIO_PCI_CAP_PCI_CFG such as bar, offset and length
remain the default value 0. Later a read or write of pci_cfg_data needs
these information to perform the indirect read or write to the bar
region.
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
pci_emul_find_capability can be used to get the offset of a PCI
capability in PCI configuration space.
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
Move rpmb_sim.c and rpmb_backend.c to hw/platform/rpmb/
Signed-off-by: Huang Yang <yang.huang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
A simulated rpmbfile requires to enable 4MB access by writing
the last byte.
Otherwise, the read operation should be failed if no write
was operated on the address greater than the read address.
Writing the last byte during file creating ensures the whole
4MB address is readable.
Signed-off-by: Huang Yang <yang.huang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Fix by a fixed string length and correcting return value
Signed-off-by: Huang Yang <yang.huang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Android HWC has problem when only see one display, then this is
workaround patch to make Android HDMI2 display normal.
V2: only change AaaG UOS kernel boot arg
Signed-off-by: Fei Jiang <fei.jiang@intel.com>
According to the syntax defined in C99, each struct/union field must have an
identifier. This patch removes unnamed struct/union fields that can be easily
expressed in a C99-compatible way.
Here is a summary of structs/unions removed.
struct vhm_request:
union {
uint32_t type; uint32_t type;
int32_t reserved0[16]; => int32_t reserved0[15];
};
struct vhm_request_buffer:
struct vhm_request_buffer {
union { union vhm_request_buffer {
struct vhm_request ...; => struct vhm_request ...;
int8_t reserved[4096]; int8_t reserved[4096];
} }
}
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
With '--ptdev_no_reset', DM doen not abort but warn when assign PCIe
dev without reset capability.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
Check reset method for PCIe dev according to 'reset' in sysfs, which
indicates reset capability, like FLR and secondary bus reset. PCIe dev
without reset capability is refused for passthrough to avoid failure
after UOS reboot.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
