Commit Graph

6 Commits

Author SHA1 Message Date
Li, Fei1
5a47c267e3 hv: vlapic: simple vlapic_rd/wr input
Remove unnecessary input parameters

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:38 +08:00
Yonghua Huang
d6904b412c hv: rename VM exit handlers in vlapic
to keep aligned with the vmexit reasons' name defined in
SPEC.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:19:37 +08:00
Yonghua Huang
7d8803f5ea hv:enable APICv features based on CPU capability
this patch is to detect and enable only APICv features which
are actually supported by the processor, instead fo tuning on
all features by default.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:19:37 +08:00
Yonghua Huang
f01a8eef58 Add APIC ACCESS VMexit handler
Update 'apic_access_exit_handler()' function to emulate
guest instruments to read/write guest's lapic registers page

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:19:37 +08:00
Jason Chen CJ
fcb95d02d6 uefi: init vlapic according to native lapic
this patch save native lapic configuration and restore it to vm0's vlapic
before its running, then doing hpet timer interrupt injection through vlapic
interface -- this will not mess up vlapic and we can see hpet
timer interrupt coming continuously.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:19:37 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00