2 Commits

Author	SHA1	Message	Date
Wei6 Zhang	b919e3d155	misc: add the SBI uart type for RISC-V ... Tracked-On: #8842 Signed-off-by: Wei6 Zhang <wei6.zhang@intel.com>	2025-11-04 14:44:49 +08:00
Fei Li	df5a5f2657	vuart_config: separate vuart config from vm config file ... Not add mmio vuart support now. Tracked-On: #8805 Signed-off-by: Fei Li <fei1.li@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>	2025-10-14 14:45:12 +08:00