Commit Graph

5 Commits

Author SHA1 Message Date
Peter Fang
4642269248 dm: vhpet: add vHPET support
vHPET is used as a source of system timer by UEFI (e.g. OVMF).

This provides an alternative to using vPIT, which OVMF assumes is always
connected to vPIC.

This is ported from Bhyve, with a few changes:

- move to user space, using acrn_timer
- enable timers only when necessary

Origin: FreeBSD
License: BSD-3-Clause
URL: https://svnweb.freebsd.org/
commit: 326257
Purpose: Adding vHPET support.
Maintained-by: External

Tracked-On: #2319
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-23 10:33:28 +08:00
Yin Fengwei
8787b65fde dm: fix the issue when guest tries to disable memory range access
According to PCI spec 3.0 section 6.2.2 "Device Control", guest
could write the command register to control device response to
io/mem access.

The origial code register/unregister the memory range which is
not suitable because it can't handle the sequence:
  1. disble the device response to specific memory range
  2. reboot guest (DM will try to free the memory range which
     was freed in step 1 already)

Tracked-On: #1277
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-10-08 12:57:00 +08:00
Zide Chen
df4ab92e81 DM: cleanup for header inclusions
used https://gitlab.com/esr/deheader to detect and remove unnecessary
header file inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-06-07 14:35:30 +08:00
Yin Fengwei
96085d960f DM: release mem range allocated in init_pci
Two memory ranges are allocated:
  - PCI ECFG
  - PCI hole
They should be released when deinit_pci. Old code mark
this two ranges not unregistered. Which is wrong for
warm reboot case. Make them could be unregistered.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:25:55 +08:00
Anthony Xu
bd31b1c53e initial import
internal commit: 0ab1ea615e5cfbb0687a9d593a86a7b774386076

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
2018-05-11 14:44:28 +08:00