1G PCI hole is added just after 4G address which is used as the
PCI high MMIO address space. Guest high memory is mapped from 5G
address for both EPT and device model user space address. Guest
e820 table and API vm_map_gpa are updated accordingly.
Tracked-On: #2577
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Also remove the '\n' from the hugetlb's file name.
Tracked-On: #2133
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Type '-T' in DM cmdline to enable hugetlb memory allocation.
It enabled 2 level of huge page:
Level 1: size 2M, path: /run/hugepage/acrn/huge_lv1/guid
Level 2: size 1G, path: /run/hugepage/acrn/huge_lv2/guid
NOTE:
before running, please make sure system already have enough hugepages
reserved under:
/sys/kernel/mm/hugepages/hugepages-xxxxkB/nr_hugepages
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
