Assign PCPU0~3 to post-launched VM. The CPU affinity can be overridden
with the '--cpu_affinity' parameter of acrn-dm.
v1-v2:
1) add 3 POST_STD_VM and 1 KATA_VM to industry scenario for whl-ipc/nuc7i7dnb.
v2-v3:
1) remove the MAX_KATA_VM_NUM from scecnro config.
2) add gvtd args for nuc7/nuc6 board.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Remove cpu_sharing item from launch config xml.
2.Add cpu_affinity for launch config xmls to configurable POST VM cpu
affinity from webUI.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Change the tag name from "vcpu_affinity" to 'cpu_affinity" in all the per
board scenario xml files, and change the descritpions.
Tracked-On: #4641
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Leave HV_RAM_SIZE/HV_RAM_START default to blank, and config tool would
generate for them, otherwise, they would be set by the UI.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. Set default value for HV template.
2. Refine vuartx in template vm setting xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. modify epc_section to configurable="0".
2. add 'idle=halt' for sos bootargs to impove performance.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Use vm_type to instead combination of load_type/uuid/severity in config
xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Add pass-thru PCI device for pre launched vm section in config xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Update the board defconfig to scenario config xmls, and user can configure
it from webUI.
Tracked-On: #4634
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Launch script should be set to 'Disabled'/'Enabled' from webUI while
hv enabled/disabled the cpu sharing.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
To keep align hypervisor source code for scenario config, need add
the 'severity' item tag into scenario config files.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add missing 'ramdisk_mod' item tag of industry config xml for tgl-rvp.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. Some VMs don't need pci-gvt args or or need specific configuration
for 'gvt_args' item tag, this patch changes from selectable behavior to
editable for 'gvt_args' item from webUI.
2. Modify the description for gvt_args item tag from launch config xmls.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. Use acrn-configure tool to generate xml files to support TGL
RVP board. You need make menuconfig as guide in github, and then
comiple as following:
make hypervisor BOARD_FILE=path/xxx.xml SCENARIO_FILE=path/yyy.xml
2. Also uos launch script can be generated by acrn-configure tool with the
uos luanch xml file
Tracked-On: #4181
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
