Unifies the logs to pr_* interfaces instead of printf for better log management.
Tracked-On: #5267
Signed-off-by: Sun Peng <peng.p.sun@intel.com>
Reviewed-by: Chi Mingqiang <mingqiang.chi@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Some passthrough devices have no reset mechanisms which cause the device stay
in unknown status during boot/reboot flow. And such unknown status cause
unexpected behaviors in the guest. Except the ordinary reset mechanisms
like FLR, we can utilize enter/exit D3cold as the reset that D3cold will
power gate the entire hardware. But the D3cold is implemented as ACPI
method which has no user interface in the SOS side. But the D3cold is
implemented as ACPI method which has no user interface in the SOS side.
But base on our experience, some devices can utilize D3hot instead of
D3cold. But it is not useful for all PCI devices as the power status
of D3hot is implementation defined.
Provide one new API to program PowerState(D0/D1/D2/D3hot) in PMCSR
register.
Add "d3hot_reset" sub-parameter for passthrough device to enable utilize
enter/exit D3hot flow to implement reset mechanisms.
Tracked-On: #5067
Signed-off-by: Long Liu <long.liu@intel.com>
Reviewed-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Currently the DM will return the passthrough device to SOS when the DM
needs to be terminated. But the device is not reset. In such case it
will cause the garbage display issue when the GPU passthrough device
is returned.
Tracked-On: #4719
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
EHL graphics data stolen memory(DSM) info has diff with KBL/WHL,
which includes two parts:
(1) DSM register location in pci config: on KBL/WHL, the register
locates on 0X5C, while on EHL, the register locates on 0xC0.
(2) DSM address length: On KBL/WHL,
DSM addr has 32 bits, while on EHL,DSM addr has 64 bits.
Here, refine graphics data stolen memory passthru to enable GVT-d on EHL platforms.
v3 -> v4:
* add MICRO INTEL_ELKHARTLAKE
v2 -> v3:
* refine discription,MICRO name
* refine code style
v1 -> v2:
* add callback functions for scalability
Tracked-On: projectacrn#4700
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Pack GPU DSM(Data Stolen Memory) and Opregion related operations
into function passthru_gpu_dsm_opregion to avoid passthru_init too mess.
Tracked-On: #4700
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
"gsm" term is not precise to describe GPU stolen memory,
It should be "dsm", which acronyms for data stolen memory.
Tracked-On: #4700
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
There're some PCI devices need special handler for vendor-specical feature or
capability CFG access. The Intel GPU is one of them. In order to keep the ACRN-HV
clean, we want to throw the qurik part of PCI CFG asccess to DM to handle.
To achieve this, we implement per-device policy base on whether it needs quirk handler
for a VM: each device could configure as "quirk pass through device" or not. For a
"quirk pass through device", we will handle the general part in HV and the quirk part
in DM. For a non "quirk pass through device", we will handle all the part in HV.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
In order to add GVT-D support, we need pass through stolen memory and opregion memroy
to the post-launched VM. To implement this, we first reserve the GPA for stolen memory
and opregion memory through post-launched VM e820 table. Then we would build EPT mapping
between the GPA and the stolen memory and opregion memory real HPA. The last, we need to
return the GPA to post-launched VM if it wants to read the stolen memory and opregion
memory address and prevent post-launched VM to write the stolen memory and opregion memory
address register for now.
We do the GPA reserve and GPA to HPA EPT mapping in ACRN-DM and the stolen memory and
opregion memory CFG space register access emulation in ACRN-HV.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Let the ACRN HV to do this in shutdown sequence. In this case, the RTVM could be
still alive if something wrong happened to cause the DM died.
Tracked-On: #4428
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Since this callback is only useful for pass through PCIe device and now pass through
PCIe device emulation has splited from DM to HV. we could remove this callback now.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
SOS should not access the physical PCI device which is assigned to other guest.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Now we split passthrough PCI device from DM to HV, we could remove all the passthrough
PCI device unused code.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
In this case, we could handle all the passthrough PCI devices in ACRN hypervisor.
But we still need DM to initialize BAR resources and Intx for passthrough PCI
device for post-launched VM since these informations should been filled into
ACPI tables. So
1. we add a HC vm_assign_pcidev to pass the extra informations to replace the old
vm_assign_ptdev.
2. we saso remove HC vm_set_ptdev_msix_info since it could been setted by the post-launched
VM now same as SOS.
3. remove vm_map_ptdev_mmio call for PTDev in DM since ACRN hypervisor will handle these
BAR access.
4. the most important thing is to trap PCI configure space access for PTDev in HV for
post-launched VM and bypass the virtual PCI device configure space access to DM.
This patch doesn't do the clean work. Will do it in the next patch.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Intel Graphics Device(IGD) passthrough on Windows guest
has the restriction that it need a lpc bridge device
located in 00:1f.0 PCI slot.
This patch add a 'gpu' option for 'passthrou' type device,
which will create the dedicated "igd-lpc" for IGD passthrough.
Tracked-On: #4405
v2 -> v3:
* refine the commit message and comments.
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
uos IGD driver need opregion when enable GVT-d.
This patch pass-thru opregion to uos gpu.
Here is the steps:
(1) set opregion gpa(guest physical addrress) 0xDFFFD000;
(2) get opregion hpa(host physical addrress);
(3) build EPT mapping for opregion.
v1 -> v2:
* initialize the EPT mapping for passthrough GPU opregion region
in passthru_init instead of reading the ASLS config space
v2 -> v3:
* add EPT unmap when deinit
* change some micro name
Tracked-On: #4360
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
gop driver and uos IGD driver will use
graphics stolen memory(gsm) when enable GVT-d.
This patch pass-thru gsm to uos gpu.
After set physical GPU gsm size 64MB in host BIOS:
Here is the steps:
(1) set gsm gpa(guest physical addrress) 0xDB000000;
(2) get gsm hpa(host physical addrress);
(3) build EPT mapping for gsm.
v1 -> v2:
* initialize the EPT mapping for passthrough GPU gsm region
in passthru_init instead of reading the BDSM config space
v2 -> v3:
* add EPT unmap when deinit
* change some micro name
Tracked-On: #4360
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Now the PCI bar uses the hardcoded prefetch property
for the pass-through device.
This doesn't work when trying to load windows GPU driver
for the pass-through GPU device.
For pass-through devices,
set the bar prefetchable property the same as physical bar.
Tracked-On: #4282
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Do reset for passthrough PCI device by default when assigning it to post-launched
VM:
1. modify opt "reset" to "no_reset" -- could enable no_reset for debug only
2. remove "ptdev_no_reset" opt. It could be replaced by setting "no_reset" for
each passthrough device.
Tracked-On: #3465
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Use acrn-dm logger function instread of printf,
this helps the stability testing log capture.
Tracked-On: #4098
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Cao Minggui <minggui.cao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Remove the use of assert() in passthrough driver.
Tracked-On: #3252
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Some physical bar sizes are not page aligned, in order to support them,
we map a bigger region which is page aligned.
Tracked-On: #3181
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
For PCI passthrough device when guest OS updates the BAR address
the corresponding EPT mapping should be updated as well.
Tracked-On: #2962
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Signed-off-by: Liu Shuo A <shuo.a.liu@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
ACRN interepts vm_set/reset_ptdev_intx_info hypercalls to set
the SOS vdev properties to indicate it is assigned to UOS. Today,
upon vm_reset_ptdev_intx_info hypercall ACRN does not revert the SOS
vdev properties back to that of SOS, as vbdf and pbdf were not
part of the API. This would leave ACRN data structures in an incorrect
state
Tracked-On: #2700
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add SDC ACPI device in dsdt, and assign GPIO 0 to SDC for SD card
detection.
Currently, the SD card hotplug function needs to insert SD card when
system boot, otherwise, it does not work. Since it needs P2SB virtualization
to set SD card presence state, and P2SB does not support user space interfaces
so this is an known issue.
Tracked-On: #2512
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Physcial bdf is needed in hypervisor to find the right pci dev.
Tracked-On: #2788
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Now it will call the below function to create the corresponding pci_device_iterator
in passthrough device initialization. But it is not released in time.
So it needs to be released to fix the memory leak issue.
Tracked-On: #2762
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: He, Min <min.he@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Fix potential memory leakage in some error case handling.
Tracked-On: #2704
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Release the resource reqeusted during msix table init if error occurs.
Change the type of the second arg of deinit_msix_table from pci_vdev to ptdev,
to align with init_msix_table.
Tracked-On: #1782
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Currently, the emulation of pci msi/msix can be handled by hypervisor code.
The logic in dm passthru driver can be simplified.
This patch remaps msix table to usersapce in DM passthru driver.
1. The access to the msix table in passthru driver will be trapped, and emulated by hv code.
2. The access to the config space in passthru driver will be trapped, and emulated by hv code.
So dm passthru driver no longer needs to keep the whole logic of handling msi/msix.
No need to do msix table remapping in sos kernel.
After the patch, the msix table ioremap code in vhm_dev.c can be removed.
Tracked-On: #1782
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Replace sscanf in device model hw directory
Tracked-On: #2079
Signed-off-by: Long Liu <long.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: <yonghua.huang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
NHLT table contains the settings some audio drivers need.
An ACPI method is used to get NHLT table address & length.
In current DM code, the NHLT talbe length in the ACPI method
is hardcoded, which will cause troubles when the length of the
table changed.
This patch replaces the hardcoded NHLT table length according to
the table length read from SOS.
Tracked-On: #1461
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
The write_dsdt_xhci function is use for describe the xdci dsdt table.
Correct its name.
Tracked-On: #1444
Signed-off-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Add a function to do msix table deinit.
1. call api to reset msix entry in hypervisor
2. free virtual msix table memory
3. unmap pba page if any
4. unmap the pages passhtru to uos in MSIX BAR if any
Tracked-On: #1222
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Normally, for devices support MSI-X, PBA is passed-through to guest.
However, PBA and MSI-X table share the same bar, and part of PBA and
MSI-X table may share a same page for some devices.
If that is the case, the part of PBA within the page should be emulated
rather than passed-through.
This patch adds PBA emulation support for MSI-X.
Tracked-On: #1222
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
CAVS audio driver depends on the NHLT table to get topology info.
Enable NHLT table in DM for audio passthrough.
Also increase the size reserved for NHLT in ACPI table from 2048B to 2560B.
Tracked-On: #1284
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
In current code, when read/write msix table, it first handle the case
the offset is in pba range when msix talbe and pba share the same bar.
But the code didn't add the condition whether pba bar equals msix table
bar. It will cause problems for the passthrugh devices,whose pba and msix
table don't share the same bar.
Tracked-On: #1209
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Unmap ptdev BAR when deinit to comply with native system, who zap out
all pre-allocated BARs.
Tracked-On: #1146
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
WIFI dev has no FLR, so 'reset' in sysfs calls secondary bus reset,
which cause PCI configuration mess(all FF) then passthrough failure.
To fix it, this patch makes no reset before passthrough by default,
until append this option.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Current option of removing vGSI capability is global, which exposes
vIOAPIC link for all ptdev even only one need this. This patch makes
it as ptdev local option to lower the system level impact. To keep
vGSI for MSI capable ptdev, just explicitly append ",keep_gsi" in
option list, like "-s 14,passthru,0/e/0,keep_gsi"
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
- hardcode the devices' GSI info based on the platform
- reject the passthrough if the following requirement is not met
all the PCI devices that are sharing the same GSI should be assigned
to same VM to avoid physical GSI sharing between multiple VMs.
v4 -> v5
* Move the gsi_dev_mapping_tables definition in a separate file
* Add the GSI info that might be used by GPIO
* Update the HW name
v3 - > v4
* Refine the format of raw data to improve the readability
* Remove the redundant code when adding the new dev into the gsi
sharing group
v2 -> v3
* Add the MSI/MSI-x capability check
Do not add the device which supports MSI/MSI-x to the GSI sharing
group.
v1 -> v2
* Update the GSI raw data based on SBL
* Free the resources when gsi sharing violation occurs
* Move the MACRO PCI_BDF(b, d, f) to pci_core.h since passthrough.c
and gsi_sharing.c are both using it
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
When enabling GPU passthru for guest, stolen memory needs to be
disabled. This change disables stolen memory in passthru mode.
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
With current implementation:
vm_init_vdevs only handles the negative error code, while passthru_init
returns positive error code when error occurs.
This causes unexpected dm crash since the real error is not being
handled properly.
What this patch does:
Change the error code to be negative value in passthru_init because it
is common in Linux kernel to return negative value when error occurs.
v2 -> v3
* add more comments about the reason to convert the return value
v1 -> v2:
* add a wrapper API to convert the error returned from pci_system_init
to the ERROR we defined in DM
* use the defined errno as the return value rather than -1
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
NHLT table is used by some audio driver for topology data, but current
default audio driver doens't depend on it. Disable it by default due
to possible boot failure with different SOS firmware.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
With '--ptdev_no_reset', DM doen not abort but warn when assign PCIe
dev without reset capability.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
Check reset method for PCIe dev according to 'reset' in sysfs, which
indicates reset capability, like FLR and secondary bus reset. PCIe dev
without reset capability is refused for passthrough to avoid failure
after UOS reboot.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
IPU devices are using I2C device with physical BDF 0:16.0.
The I2C controller has the dependency on ACPI info.
This patch is to add ACPI info for the I2C controller and the two IPU
devices that are under the scope of I2C.
Note:
This patch is specific for GP platform.
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
