For service and pre-launched VMs, the image loaders in ACRN
are functioning the same way as an in-guest bootloader such
as GRUB, which allows ACRN to load a guest image and start
directly from there and therefore skipping the firmware
initialization stage.
To re-use image loader code as much as possible, the image loader
logic is splitted into two stages, the loading stage and
environmental preparation stage. Most part of the loading stage
are common logic, and environmental preparation stage should
be completely arch-specific.
The best place for stage two loader logic is arch_vm_prepare_bsp,
which prepares vcpu register states based on the loaded image
(entry point, load address, etc.).
This commit refactors only the rawimage loader. Other loaders
are left for future improvement.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
prepare_os_image should not touch vcpu internal state.
Move this operation to arch_vm_prepare_bsp.
Since arch_vm_prepare_bsp now changes vcpu registers,
this action also affects the logic of resume_vm_from_s3.
Refactor resume_vm_from_s3 to avoid direct call to
start_vm.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Move vm_config to common scope. This change also affects auto-generated
C/H files from configuration tools.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Move reset_vm to common scope and remove unused reset_mode.
The reset_mode in x86 reset_vm code is simply used as an if condition
on whether the prepare_os_image should be executed. The entire
if body will never be true as we don't support resetting Service VM
without resetting ACRN hypervisor. To reset Service VM, the only
way is through a platform reset. Therefore the prepare_os_image
action will never be called. Delete this action.
Once the if condition and prepare_os_image action is deleted,
the input parameter "mode" is useless. Delete that too. The reset_vm
API in ACRN is simply a "warm reset". It does not need to take
input.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
The shutdown_vm is renamed to destroy_vm,
and introduce arch_deinit_vm as mandatory arch public API.
The original shutdown_vm checks if all VMs are shutting down,
and shutdown platform if no other VMs are running.
This logic is moved to the caller of original shutdown_vm
except hypercall, as we post-launched VM shutdown should not
trigger platform shutdown.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
start_vm is moved to common scope calling
arch_vm_start_bsp, which is a mandatory API
for all archs.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
The logic in prepare_vm can be embedded to launch_vms
and create_vm with better readability.
The movement does not change original logic.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Li Fei <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
launch_vms and create_vm need to be moved together as both of
them reference file-static structures. All related structures
and helpers accessing structures are also moved.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Li Fei <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Adjust kick_vcpu logic and move to common scope.
Moves also vcpu_make_request to common scope and adds
vcpu_has_pending_request and vcpu_take_request helpers.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Li Fei <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Move reset_vcpu to common. Original x86 reset_vcpu
takes an extra parameter to handle both reset and init reset.
Common API hides this detail and let arch specific code handle
this.
This patch also renames x86 specific vcpu_reset_internal to
x86_vcpu_reset_internal.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
vlapic state updating basically updates a per-VM variable of
vlapic mode. vlapic mode updating should NOT happen with each
and every vcpu state update. Consider the case where a VM has
all vcpus except the last one being X2APIC, and the last one
is in the process of transitioning to X2APIC. When HV is emulating
the transitioning, request processing fails and we zombie this
vcpu. This causes the vlapic_mode to be incorrectly set to
X2APIC.
vlapic mode updating should be confined to the following cases:
1, when guest changes APIC mode
2, when guest receives SIPI/INIT
Here we also prove that the logic is correct/equivalent as before.
update_vm_vlapic_state is called in vcpu state transitioning functions:
offline_vcpu, zombie_vcpu, reset_vcpu, launch_vcpu.
launch_vcpu:
launch_vcpu is called in two places. vBSP launch and vAP launch.
vBSP launch does not need to update vlapic state as by default
vm->arch_vm.vlapic_mode is set to XAPIC_MODE (set in create_vm).
vAP launch is handled by this patch.
reset_vcpu:
reset_vcpu is called in two places. INIT_RESET and VM reset.
INIT_RESET is handled in this patch. VM reset does not need to
update_vm_vlapic_state as we manually set this to default XAPIC
in reset_vm.
zombie_vcpu:
As stated above, zombie_vcpu should NOT change vlapic mode, as
the action of zombie_vcpu is transparent to guest. It is only called
to pause vcpu thread.
offline_vcpu:
Offline_vcpu is called in two places: shutdown_vm and hypercall to
offline Service VM vcpus. In the first case it doesn't matter as
VM is being destroyed. In the second case, Service VM is already
in one of XAPIC or X2APIC mode, and offlining vcpus does not change
this mode (therefore not needed).
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Move vcpu API create_vcpu to common.
* Break create_vcpu into common vcpu init and arch_init_vcpu
for arch-specific initialization.
* Move vcpu_thread to arch-specific and rename to arch_vcpu_thread
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
This commit moves struct acrn_vm under common header vm.h, and move some
x86-specific members of struct acrn_vm into arch_vm. This commit focuses
on struct cleanup only. API cleanup will be in future patch series.
The affected members are:
e820_entry_num
e820_entries
wire_mode
wbinvd_lock
vlapic_mode_lock
vcpuid_entry_nr
vcpuid_level
vcpuid_xlevel
vcpuid_entries
reset_control
pm
sworld_control
sworld_snapshot
intr_inject_delay_delta
Moved to common vm.h:
ept_lock -> rename to stg2pt_lock
ept_pgtable -> rename to stg2_pgtable
nworld_eptp -> rename to root_stg2ptp
emul_mmio_lock
nr_emul_mmio_regions
emul_mmio
emul_pio
To avoid circular dependency, some in-header helpers are also moved into
common vm.h.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
This commit cleans up struct acrn_vcpu. vcpu API cleanup will be in
future patch series.
Create a common vcpu.h hosting struct acrn_vcpu, and move some x86
specific members of struct acrn_vcpu into struct acrn_vcpu_arch. These
members includes:
reg_cached
reg_updated
inst_ctxt
And pending_req is being moved from arch to common.
And the maximum number of events (i.e., VCPU_EVENT_NUM) are being
replaced by MAX_VCPU_EVENT_NUM.
To avoid circular dependency, some in-header helpers are moved into
vcpu.c with only prototypes being declared inside header.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Add stack protector implementation for RISC-V architecture using a
global __stack_chk_guard variable. This differs from x86 which uses
per-CPU stack canaries.
Tracked-On: #8834
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Add RISC-V specific implementation of arch_get_random_value() that
combines entropy from rdcycle and rdtime counters. This provides a
portable solution since the Zkr entropy extension is optional in RVA23
profile.
Tracked-On: #8834
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Stack canary implementation varies across architectures. x86 uses a
per-pCPU __stack_chk_guard while RISC-V uses a global variable shared
across all pCPUs. Move struct stack_canary from the common per_cpu
structure to per_cpu_arch to allow architecture-specific stack
protection implementations.
Tracked-On: #8834
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
The ACRN hypervisor binary can be loaded at a physical address different
from its configured link address (CONFIG_HV_RAM_START) due to bootloader
constraints or memory layout requirements. However, the current MMU
initialization code always maps the hypervisor using the compile-time
link address, which causes page faults when the hypervisor is actually
loaded elsewhere. Since ACRN uses identity mapping (VA == PA) for the
hypervisor address space, both the virtual and physical base addresses
in the page table mapping must reflect the actual runtime load address,
not the link-time address.
Tracked-On: #8825
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
The following flags are assigned to CFLAGS/LDFLAGS when trying to build
a relocatable acrn.out (ELF):
- CFLAGS += -fpie & ASFLAGS += -fpie:
- Produces position-independent code suitable for executables (not shared libraries).
- Uses PC-relative addressing for global variables and function calls
- Generates code that can be loaded at any memory address
- Together with -mcmodel=medany is used to support "Medium Position
Independent Code Model"
- CFLAGS += -fvisibility=hidden:
- Enabled with --gc-sections, the -fvisibility=hidden compiler flag
increases the number of symbols the linker can identify and remove
as unused. This reduces the final binary size and can improve
performance
- LDFLAGS += -shared:
- Create a shared object (ELF::e_type == 3) instead of an executable
- This is required to support a relocatable acrn.out
- LDFLAGS += -Wl,-z,notext
- Allow relocations in read-only segments (text relocations)
- Resolves linking errors when absolute addresses exist in read-only
sections
- LDFLAGS += -Wl,-Bsymbolic
- Prioritizes local symbol definitions over external ones
- Improves performance by avoiding PLT (Procedure Linkage Table) calls
for local symbols
- LDFLAGS += -Wl,-z,defs
- Forces the linker to resolve all symbol references at link time
- Report undefined symbol errors during linking
In summary:
- -fpie + -shared: Creates a position-independent shared object that can
be loaded as an executables
- -z,notext + -Bsymbolic: Allows internal relocations while keeping
symbols local
- -z,defs: Ensures all symbols are properly defined, preventing runtime
errors
We are using --start-group/--end-group to link all the modules. When
using -shared, the linker discards unused symbols by default, even if
they are marked with KEEP() in the linker script. This is because shared
libraries typically allow undefined symbols to be resolved at runtime.
To ensure the entry point is included, we need to add EXTERN(_start) to
the linker script, which forces the linker to treat _start as a required
symbol that must be resolved during the linking process.
Tracked-On: #8825
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
To support CONFIG_RELOC differnt ${ARCH} has different CFLAGS and
LDFlAGS. This patch move CFLAGS and LDFLAGS to support x86 relocation
build to x86 arch/Makefile.
Tracked-On: #8825
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
This patch implements relocation support for ACRN RISC-V to enable
position-independent execution. The hypervisor can now be loaded at any
physical address and will automatically relocate itself at runtime. Key
changes:
- Add relocate() function to process R_RISCV_RELATIVE relocations in
.rela sections during early boot
- Implement arch_get_hv_image_delta() to calculate the load address offset
from the configured base address
- Add relocation processing in cpu_entry.S before jumping to C code
- Update linker script to include .rela sections for relocation data
- Define R_RISCV_RELATIVE relocation type and linker symbol definitions
Tracked-On: #8825
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Move dynamic sections and relocation sections data structures to
elf.h and enclose function relocate with CONFIG_RELOC. The input
parameter struct Elf64_Dyn *dynamic is not used by x86-64 now because
x86-64 can use pc-relative addressing to get the acutaly load address
of _DYNAMIC in the C code.
Tracked-On: #8825
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
add BSP and AP initialization function.
and call uart16550_init to update uart_base_address
after init paging.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
riscv only need to map mmio and hv owned memory, donot
need to map guest memory. And need detection for svpbmt extension
to support page table defined memory attribute programming.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Add functions get_board_hv_device_start/get_board_hv_device_size
to get mmio device start address and size. These are needed to be
generated by config tool or runtime parsing DTS, wrap the method
here.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
this patch calculate riscv static pages number for page pool.
riscv donot need to map guest memory. use link script address
label to map code size.
For risc-v:
1) if the platform doesn't support PCIe devices
The address space layout for risc-v is like
| |
| MMIO |
| |
| ... |
| |
| RAM |
| |
For all its address space, one 1GB page table is enough which cover 512G
For MMIO or RAM, if its start address and end address is 1G aligned, there's no 2M
or 4K page table is needed. if their address are not 1G aligned, two 2M page table
is enough for MMIO or RAM. The issue here is that if we neetid 4K page entries for
different page attributes. So we need to reserve enough 4K page tables for that requirement.
2) if the platform support PCI devices, for the low MMIO range, another two 2MB page
table may needed. for the high MMIO range, its depends on the max physical address bits of
the platform and the high MMIO range reserved by the BIOS.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Add hypervisor pagetable manipulate interface to riscv arch directory,
which is needed by the common interface, and add riscv ppt pgtable
structure implementation.
Tracked-On: #8831
Signed-off-by: Haicheng Li <haicheng.li@intel.com>
Co-developed-by: hangliu1 <hang1.liu@intel.com>
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
add pgtable callbacks set_pgentry to implement arch specific
set generic page table entry for any paging level, and remove
x86 specific tweak_exe_right/recover_exe_right callbacks, move
the logic in set_pgentry callback.
remove common set_pgentry function to avoid confusing.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
move early_pgtable_map_uart and pgtable_create_trusty_root
to x86 code, and provide calling with x86 private header
pagemisc.h
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
this patch moves function xx_offset and xx_index to common code,
Add arch interface arch_quirk/arch_pgtle_page_vaddr and
arch_pgtle_large.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
move _page_table_level to common, and rename functions and
variables to comform with pgtln style
when we refer to pgtl0e, it means the lowest translation
table entry, while the "pte" refers generic page table entry.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
add x86 mm_common.h to map common macro name to x86 name
and chang them in common/mmu.c, replace XX_PFN_MASK with
PFN_MASK, since they are the same.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
