move e820_default_entries[] from vm_description.c to ve820.c and rename
to ve820_entry[] as a temparary solution for partiton mode e820 management;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Rename vlapic_deliver_intr to vlapic_receive_intr: ioapic/msi device
deliver an interrupt to lapic.
Rename vlapic_pending_intr to vlapic_find_deliverable_intr: find a
deliverable interrupt which pending in irr and its priority large than ppr.
Rename vlapic_intr_accepted to vlapic_get_deliverable_intr: get the deliverable
interrupt from irr and set it in isr (which also raise ppr update)
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
CRx 'guest/host mask' is widely used when talking
about CR0/CR4 virtualization in SDM spec,
rename them to 'VMX_CRx_GUEST_HOST_MASK'.
Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- move `vcpumask2pcpumask` from `guest.c` to `vcpu.c`
- move `prepare_sos_vm_memmap` from `guest.c` to `vm.c`
- rename `guest.c` to `guest_memory.c`
Tracked-On: #2484
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch adds IR enable/disable APIs. Upon boot, enabling IR is
deferred until the first interrupt source is programmed. This is done
for UEFI platforms as UEFI bootloader depends on timer interrupt and
the programming of timer interrupt source is done before ACRN gets a
chance to run during boot.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
When a corresponding IOMMU is found for the device, this patch adds
support to program Interrupt Remapping hardware RTEs and the original
interrupt sources (MSI or IOAPIC) with IR format.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Interrupt Remapping hardware in x86 can hold 64K entries with each entry
of size 16 bytes. So 256 entries occupy 4K. Adding a configuration for
developer to choose number of IR entries, in multiples of 256. ACRN does
not boot on platforms that does not support Interrupt Remapping and
Extended Interrupt Mode
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
IOAPIC info, specifically ID, is needed to map the IOAPIC to
corresponding DMAR. DMAR table in ACPI has a field that has IOAPIC
ID, that matches the info provided in MADT. Both (IOAPIC info from
MADT and from DMAR) is needed for remapping IOAPIC interrupts.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
As we enable Interrupt Remapping Hardware in ACRN, Queued Invalidation
(QI) needs to be used clear DMAR hardware caches. This patch introduces
Queued Invalidation APIs. Code related to Register based Invalidation
is removed from ACRN and platforms that do not support QI cannot boot
with ACRN after this patch.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
According to SDM 24.7.2, these two MSRs should be
configured with physical address.
Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
With lapic_pt based on vlapic, guest always see vitual apic_id.
We need to convert the virtual apic_id from guest to physical apic_id
before writing ICR.
SMP for VM with lapic_pt is supported with this fix.
Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Use smp_call_function() to read/write MSR register on target PCPU
Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add this magic number to prevent potential overflow when dumping
host stack.
Tracked-On: #2455
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
As scheduler uses its own stack for now,
there is no need to check stack validity,
so wipe it out.
Tracked-On: #2455
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
ASSERT could be used in some situations, such as, there are some pre-assumption
for some code, using ASSERT here for debug. It could not be used for detect error
when system booting where panic should be used.
Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Panic should only be used when system booting. Once the system boot done,
it could never be used. While ASSERT could be used in some situations, such
as, there are some pre-assumption for some code, using ASSERT here for debug.
Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
Use bitmap_set_nolock/bitmap_clear_nolock instead of
bitmap_set_lock/bitmap_clear_lock for the local variable.
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
1. in UEFI bsp code, not need UEFI macro; it is controlled in makefile.
2. in vm/acpi/interrupt code, unify the API name for SBL & UEFI.
3. remove unnecessary header including and unused code.
Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
In current code, there is a logic bug when inject low priority
exceptions.
If guest irq enabled, low priority exception will not be injected to guest.
This patch fix the logic error, if there is no eligible vector before
handling low priority exceptions, then inject low priority exception if
any.
Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acrn doesn't support nested virtualization, so vmx operations should be
undefined opcode for guest.
Current code handle vmx operations with unhandled_vmexit_handler.
According to the spec, if guest execute vmx operation instruction, a #UD
exception should be inject.
This patch inject a #UD exception when guest execute vmx operation instruction.
Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
-- move vm_pic() from vm.h to vpic.c since it is
only used in vpic.c
-- move vm_ioapic() from vm.h to vioapic.c
change vioapic_reset(struct acrn_vioapic *vioapic) -->
vioapic_reset(struct acrn_vm *vm)
then vm_vioapic() is only used in vioapic.c
-- move vm_vuart() from vm.h to vuart.c,
now this api is used in vuart.c and shell.c
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Some arches have more than two IOMMUs, so change this limitation.
Tracked-On: #2435
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Fixed violations in vlapic_x2apic_pt_icr_access()
- Procedure has more than one exit point;
- Value is not of appropriate type;
- Narrower init conversion without cast;
- Implicit conversion: actual to formal param (MR)
Fixed violation in switch_apicv_mode_x2apic()
- No space between if, while, for and expresn.
Tracked-On: #861
Signed-off-by: Yan, Like <like.yan@intel.com>
For VM with local apic pt for realtime scenatios, we support virtio device with PMD backend.
But we still need to inject MSI to notify the front-end, to avoid changing the front-end drivers.
Since the lapic is passed through, irq injection to vlapic won't work.
This commit fix it by sending IPI with vector need to inject.
Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Since lapic is passed through, MSI/MSIx should be configured with the
vector allocated within guest OS, instead of physical vector allocated
in hypervisor.
Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit extend lapic pass-through for DM launched VM, generally for hard RT scenarios.
Similar to the partition mode, the vlapic is working under the xapic mode at first, only
when x2apic mode is enabled, lapic is passed through, because the physical LAPICs are
under x2apic mode.
Main changes includes:
- add is_lapic_pt() to check if a vm is created with lapic pt or not, to combine
codes of partition mode and DM launched vm with lapic passthrough, including:
- reuse the irq delievery function and rename it to dispatch_interrupt_lapic_pt();
- reuse switch_apicv_mode_x2apic();
- reuse ICR handling codes to avoid malicious IPI;
- intercept ICR/APICID/LDR msr access when lapic_pt;
- for vm with lapic passthrough, irq is always disabled under root mode.
Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- vlapic_pending_intr() is called only for case no
APICv/VID(Virtual Interrupt Delivery) feature support,
in this case, there is no need to test VID case.
- remove 'apicv_pending_intr()' function.
Tracked-On: #2427
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
As we enable Interrupt Remapping, bit positions in IOAPIC RTEs
have a different syntax for programming. ACRN should handle original
format for vIOAPIC as well IR representation for physical IOAPIC.
This patch adds bit granularity IOAPIC RTE.
Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
As we enable Interrupt Remapping, bit positions in MSI address and
data registers have a different syntax for programming. This patch adds
bit granularity for MSI address and data structs.
Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
-- add header file ld_sym.h in include/arch/x86/boot/
-- move 'ld_bss_start/end' from cpu.h to ld_sym.h,
avoid reverse dependency
-- move 'ld_text_end' from mmu.h to ld_sym.h
-- move 'ld_trampoline_load/start/end' to ld_sym.h
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The sos_vm config under arch/x86/configs/$(CONFIG_BOARD) folder should be
customer specific configuration, leave it back to customer.
When hypervisor start building, it will check whether BOARD specific sos_vm.h
exist in configs/$(CONFIG_BOARD) folder. If exist, then include this header;
if not, then include default sos_vm config header under configs/default folder.
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add a API to sanitize vm_configs[] array, in this API, we will do sanity
check for VM configurations and refill some fields in vm_configs[]. If
sanity check is failed, the HV would reject to boot.
About pcpu_bitmap of SOS_VM:
We should not hard code pcpu_bitmap for SOS_VM, this is not convenient for
unconfigured boards. The pcpu_bitmap follows a very simple rule:
All physical CPUs except ocuppied by Pre-launched VMs are all belong to
SOS_VM. In this way, the pcpu_bitmap of a SOS_VM is decided by pcpu_bitmap
status in PRE_LAUNCHED_VMs.
To get the correct pcpu_bitmap of SOS_VM, We need to setup another rule, that
the vm_configs[] array should follow the order of PRE_LAUNCHED_VM - SOS_VM
strictly.
With this patch enabled, the pcpu_bitmap field of sos vm config is not needed
to configure;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
after compile, the compiled code could change rsp, so use pure asm code
to avoid such problem which will cause schedule switch failure.
Tracked-On: #2410
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
'vector' should be no greater than 0xff,else
'eoi_exit_bitmap[]' will overflow.
Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
below fields are defined but not used.
- sync, pause_cnt & dbg_req_state.
Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Previously I/O emulation completion mode mode was configured in Kconfig:
config IOREQ_NOTIFICATION
bool "Notification mode"
help
When I/O request is completed, SOS will mark the completion status and
notify hypervisor via hypercall. Hypervisor will finish the post work
when notification is received.
config IOREQ_POLLING
bool "Polling mode"
help
When I/O request is completed, SOS will only mark completion status
without notifying hypervisor. Hypervisor will poll the completion
status and finish the post work.
Now move this configuration to guest_flags of acrn_vm_config struct.
if ((vm_config->guest_flags & IO_COMPLETION_POLLING) != 0U) {
I/O with polling;
} else {
I/O with notification;
}
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
In write_trampoline_stack_sym(), when do relocation for pcpu's stack,
it wrongly adds an offset. As a result, during booting, when non-BSP
CPU (APs) tries to run trampoline code once they are waken up by BSP
via SIPI, system hangs.
Tracked-On: #2349
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Reviewed-By: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Zide Chen <zide.chen@intel.com>
when relocation is enabled, the calcuation of HV size in init_paging
routine is not right. As a result, it doesn't enable NX bit for many
pages which don't belong to hypervisor text section.
Tracked-On: #2349
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Reviewed-by: Zide Chen <zide.chen@intel.com>
In init_paging(), when modify page table, it does a round up to 2M on
the starting address of HV memory. If the address is not 2M aligned,
memory overwrite occurs, or memory attribute(cache, u/s) may be not
right. Besides, trusty memory (uos_sworld_memory) in .bss section is 2M
aligned during compiling, after enabling HV memroy 2M alignment, when
relocation is enabled, EFI stub or other loaders just needs to find a
2M-aligned starting addr for HV memory.
Tracked-On: #2349
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Reviewed-by: Zide Chen <zide.chen@intel.com>
This is the following patch after removing pending_pre_work, it make sure
all io emulation is done on its own cpu.
For hv emulated request, it follows the steps:
hv_emulate_pio->emulate_pio_complete
hv_emulate_mmio->emulate_mmio_complete
For dm emulated request, it follows the steps:
acrn_insert_request->dm_emulate_io_complete
while in acrn_insert_request, it could trigger scheduling out then resume by
hcall_notify_ioreq_finish, or busy wait for ioreq completion if polling mode
is enabled.
Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Now we do not need pending_pre_work anymore, as we can make sure IO request
VCPU resume from where it paused.
Now only three fixed points will try to do schedule:
- vcpu_thread: before vm entry, will check reschedule flag and to it if needed
- default_idle: loop check reschedule flag to see if need switch out
- io request: if IO REQ need DM's handle, it will schedule out
Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
this patch added full context switch support for scheduling, it make sure
each VCPU has its own stack, and added host_sp field in struct sched_object
to record host stack pointer for each switch out object.
Arch related function arch_switch_to is added for context switch.
To benefit debugging, a name[] field is also added into struct sched_object.
Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
separate the private macro/structure/functions, which are just used
in instr_emul.c;
and move instr_emul.h to public include path.
Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The member of lapic_pt in acrn_vm_config will be replaced by
guest_flag of LAPIC_PASSTHROUGH;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The member of mem_size and start_hpa in acrn_vm_config struct will
be replaced with the acrn_vm_mem_config struct;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
