Commit Graph

2403 Commits

Author SHA1 Message Date
Yifan Liu
134c5f6ab7 hv: vcpu: Move create_vcpu to common vcpu.c
Move vcpu API create_vcpu to common.

* Break create_vcpu into common vcpu init and arch_init_vcpu
  for arch-specific initialization.
* Move vcpu_thread to arch-specific and rename to arch_vcpu_thread

Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
2025-10-30 13:30:32 +08:00
Yifan Liu
688741074f hv: vm: Move vm common parts under common/vm.h (data structure)
This commit moves struct acrn_vm under common header vm.h, and move some
x86-specific members of struct acrn_vm into arch_vm. This commit focuses
on struct cleanup only. API cleanup will be in future patch series.

The affected members are:
e820_entry_num
e820_entries
wire_mode
wbinvd_lock
vlapic_mode_lock
vcpuid_entry_nr
vcpuid_level
vcpuid_xlevel
vcpuid_entries
reset_control
pm
sworld_control
sworld_snapshot
intr_inject_delay_delta

Moved to common vm.h:
ept_lock -> rename to stg2pt_lock
ept_pgtable -> rename to stg2_pgtable
nworld_eptp -> rename to root_stg2ptp
emul_mmio_lock
nr_emul_mmio_regions
emul_mmio
emul_pio

To avoid circular dependency, some in-header helpers are also moved into
common vm.h.

Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
2025-10-30 13:30:32 +08:00
Yifan Liu
cf91e66ac0 hv: vcpu: Move vcpu common parts under common/vcpu.h (data structure)
This commit cleans up struct acrn_vcpu. vcpu API cleanup will be in
future patch series.

Create a common vcpu.h hosting struct acrn_vcpu, and move some x86
specific members of struct acrn_vcpu into struct acrn_vcpu_arch. These
members includes:

reg_cached
reg_updated
inst_ctxt

And pending_req is being moved from arch to common.

And the maximum number of events (i.e., VCPU_EVENT_NUM) are being
replaced by MAX_VCPU_EVENT_NUM.

To avoid circular dependency, some in-header helpers are moved into
vcpu.c with only prototypes being declared inside header.

Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
2025-10-30 13:30:32 +08:00
Jian Jun Chen
0222bb0fc1 hv: multi-arch: move {arch_}get_random_value to random.c
Tracked-On: #8834
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-29 17:45:44 +08:00
Jian Jun Chen
0e0f673458 hv: multi-arch: move stack_canary to per_cpu_arch
Stack canary implementation varies across architectures. x86 uses a
per-pCPU __stack_chk_guard while RISC-V uses a global variable shared
across all pCPUs. Move struct stack_canary from the common per_cpu
structure to per_cpu_arch to allow architecture-specific stack
protection implementations.

Tracked-On: #8834
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-29 17:45:44 +08:00
Jian Jun Chen
37692038c9 hv: mutl-arch: Makefile: move CONFIG_RELOC related options to arch specific
To support CONFIG_RELOC differnt ${ARCH} has different CFLAGS and
LDFlAGS. This patch move CFLAGS and LDFLAGS to support x86 relocation
build to x86 arch/Makefile.

Tracked-On: #8825
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-22 10:15:01 +08:00
Jian Jun Chen
f904dbffbb hv: multi-arch: refine relocation related code
Move dynamic sections and relocation sections data structures to
elf.h and enclose function relocate with CONFIG_RELOC. The input
parameter struct Elf64_Dyn *dynamic is not used by x86-64 now because
x86-64 can use pc-relative addressing to get the acutaly load address
of _DYNAMIC in the C code.

Tracked-On: #8825
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-22 10:15:01 +08:00
Jian Jun Chen
f094632178 hv: move x86 reloc.c to arch/x86/boot
Tracked-On: #8825
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-22 10:15:01 +08:00
hangliu1
cbab9cbab8 hv: multiarch: add hva2hpa_early/hpa2hva_early to common
Add arch_hva2hpa_early/arch_hpa2hva_early to common, and wrap it in
hva2hpa_early/hpa2hva_early.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
a436f72493 hv: riscv: add access usr memory interface
Add pre_user_access() and post_user_access() interfaces
to protect mmio from hypervisor accidental access,
SMAP extensiton need to be detected

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
cf73187528 hv: multiarch: add arch specific set_pgentry
add pgtable callbacks set_pgentry to implement arch specific
set generic page table entry for any paging level, and remove
x86 specific tweak_exe_right/recover_exe_right callbacks, move
the logic in set_pgentry callback.

remove common set_pgentry function to avoid confusing.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
8ba4890677 hv: x86: modify Makefile to enable compile
enable complile for pagemisc.c and pgtable.c

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
5dcf336ab3 hv: x86: move two functions back to x86
move early_pgtable_map_uart and pgtable_create_trusty_root
to x86 code, and provide calling with x86 private header
pagemisc.h

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
9bedd785e3 hv:multiarch: move round_pde_down/round_pde_up to common
move to common/pgtable.h and change name to round_pgtl1_down/round_pgtl1_up

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
5cc6694eab hv: multiarch: move page table entry function
this patch moves function xx_offset and xx_index to common code,
Add arch interface arch_quirk/arch_pgtle_page_vaddr and
arch_pgtle_large.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
8be20c690b hv: multiarch: change to common page level
move _page_table_level to common, and rename functions and
variables to comform with pgtln style

when we refer to pgtl0e, it means the lowest translation
table entry, while the "pte" refers generic page table entry.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
6748f72d1b hv:multiarch: change main macro name
add x86 mm_common.h to map common macro name to x86 name
and chang them in common/mmu.c, replace XX_PFN_MASK with
PFN_MASK, since they are the same.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
c421a9557b hv:multiarch: move main memory interface to common
move below interface to common code.
pgtable_lookup_entry/pgtable_add_map/pgtable_modify_or_del_map

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
c911c3d38e hv: multiarch: move sanitize interface to common
The sanitized page is used to mitigate l1tf for x86, but sanitized_page_hpa
is the hpa used to set in the page table entry when delete or modify
page happens, it is by default is 0, other arch donot need to init it.
move this part to common for other arch to reuse it.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
2e4f5e79b7 hv:multiarch: move main memory structure to common
move struct pgtable and page_pool to common code and
move alloc_page/free_page/init_page_pool to common

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
2ab068400b hv: multiarch: move some function to common
move some funcitons like hpa2hva to common file.
change some files to include file from asm/pgtable.h to common/pgtable.h

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
Fei Li
274eec4ec2 debug: enable console and shell for risc-v
For now, BOARD should use the qemu-riscv for risc-v.
For RISC-V:
make hypervisor BOARD=qemu-riscv SCENARIO=shared ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu-
For x86:
make hypervisor BOARD=qemu SCENARIO=shared [ARCH=x86]

Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
b26ef37519 log: move print_hv_banner as common
Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
f3ab8291f4 intx: abstruct intx inject for VM
Now only x86 is implemented. RISC-V needs vPLIC support.

Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
eea9a21796 vuart: move x86 special code into x86
Only x86 has local APIC pass-thru. For release mode, the console_vmexit_callback
is empty, complier should optimize this unuseful check.

Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
0774a517a0 mmu: add dummy APIs for risc-v
This patch doesn's wrap a arch_xxx.

Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
83d56e0edb vm: add necessary dummy APIs
get_vm_from_vmid,is_paused_vm and is_poweroff_vm should be common APIs.
But now doesn't implement them as common for not introduce more VM related
data structure and APIs.

Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
ac1c79641e cmdline: move cmdline to x86
Now risc-v doesn't support cmdline

Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
b6854ac4bd io: move common IO operation out of arch
MMIO read/write without memory order should be common ARCH, without
PIO support shouldn't use PIO APIs, so implement them as empty.

Tracked-On: #8807
Signed-off-by: Fei Li <fei1.li@intel.com>
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
2025-10-09 17:15:06 +08:00
Xue Bosheng
4875a4a919 hv: refine cpu dead and cpu idle implementation
cpu_dead calls arch_cpu_dead, cpu_do_idle calls arch_cpu_do_idle,
arch_cpu_dead and arch_cpu_do_idle are required to be implemented by
each architecture.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Xue Bosheng
d8970404e3 hv: move stack_frame out of vcpu
stack_frame is not only for vcpu thread, host thread needs
it, so move stack_frame out of vcpu file.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Xue Bosheng
e278b38ec4 hv: move percpu delivery mode and idle mode from common to x86
delivery mode and idle mode are x86 specific percpu, so move it from common to
x86 arch, also change the name of mode_to_idle to be idle_mode, change the name
of mode_to_kick_pcpu to be kick_pcpu_mode.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Xue Bosheng
974e8c63ea hv: refine make_reschedule_request in schedule module
add arch_send_reschedule_request, which is called by make_reschedule_request, for X86
arch_send_reschedule_request will call kick_pcpu, arch_send_reschedule_request is arch
public API, which is needed to be implemented by each architecture.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Shiqing Gao
ca778139e6 hv: abstract IRQ related macros
Convert IRQ-related macros to static inline functions and introduce
wrappers for arch-specific implementations. This follows the style we
defined for multi-arch development.

This is a follow-up update for commit
a7239d126 ("[FIXME] hv: risc-v add denpended implementation in cpu.h").

CPU_IRQ_ENABLE_ON_CONFIG  -> local_irq_enable
CPU_IRQ_DISABLE_ON_CONFIG -> local_irq_disable
CPU_INT_ALL_DISABLE       -> local_irq_save
CPU_INT_ALL_RESTORE       -> local_irq_restore

Tracked-On: #8813
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
2025-09-29 14:01:00 +08:00
Jiaqing Zhao
5803232d83 hv: enable acrnlog in release builds
Enable acrnlog (memory logging) in release builds, default log level
is still controlled by DEBUG_OPTIONS/MEM_LOGLEVEL in scenario file.

Tracked-On: #8805
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
2025-09-25 16:30:26 +08:00
Jian Jun Chen
e5831fec1e hv: multi-arch: abstract some pcpu related interfaces and macros
The following pcpu related interfaces are moved into common:
- common/cpu.c::start_pcpus
- include/common/cpu.h::get_pcpu_id
- include/common/cpu.h::set_current_pcpu_id
Their arch specific implementations are moved into arch/$(ARCH):
- arch/$(ARCH)/cpu.c::arch_start_pcpu
- include/arch/$(ARCH)/asm/cpu.h::arch_get_pcpu_id
- include/arch/$(ARCH)/asm/cpu.h::arch_set_current_pcpu_id
The following interface is moved into common:
- pcpu_set_current_state (from arch/x86/cpu.c -> common/cpu.c)
The following MACROs are moved into include/common/cpu.h:
- CPU_UP_TIMEOUT
- CPU_DOWN_TIMEOUT
- BSP_CPU_ID
- INVALID_CPU_ID

Tracked-On: #8791
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-23 11:30:38 +08:00
Haoyu Tang
8a521fe47e hv: add common library to risc-v build
move common library from x86 makefile to common makefile.

Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-22 10:52:06 +08:00
Haoyu Tang
a226b5f0ec hv: multi-arch reconstruct bits library
Extract common interface to include/lib/bits.h, and invoke the variant
implementation of arch.
Re-implement unlocked functions as C in common library.
Rename bitmap*lock() to bitmap*(), bitmap*nolock() to bitmap*non_atomic().

Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-22 10:52:06 +08:00
Haoyu Tang
286a7557bc hv: multi-arch reconstruct atomic library
extract common interface to include/lib/atomic.h,
and invoke the variant implementation of arch.

Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-22 10:52:06 +08:00
Haoyu Tang
3a74e62ec4 hv: multi-arch reconstruct spinlock library
Extract common interface to include/lib/spinlock.h, and invoke the
variant implementation of arch.
Refine assemble macro code in case that ASSEMBLER defined.

Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-22 10:52:06 +08:00
hangliu1
a72bd5e076 hv: multiarch: abstract pcpu related data from x86
Move phys_cpu_num and pcpu_active_bitmap to common, which could be
only accessed by interfaces provided by smp.h.

v2->v3:
1. move ALL_CPUS_MASK/AP_MASK to common cpu.h

v1->v2:
1. preserve phys_cpu_num in x86 but implement arch_get_num_available_cpus()
   to provide interface for common code to access.
2. change function name test_xx to check_xx

Tracked-On: #8801
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-19 15:04:55 +08:00
hangliu1
41f04b4e7a HV: abstract percpu structure from x86 arch
Move x86 architecture dependent per cpu data into a
seperate structure and embeded it in per_cpu_region.
caller could access architecture dependent member by
using prefix 'arch.'.

v2->v3:
move whose_iwkey, profiling_info and tsc_suspend to x86
v1->v2:
rebased on latest repo

Tracked-On: #8801
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Reviewed-by: Chen, Jian Jun<jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-19 15:04:55 +08:00
Shiqing Gao
037c479221 hv: ipi: drop arch_ prefix from IPI functions
Since there is no common IPI abstraction, the arch_ prefix is redundant.
This patch renames the functions as follows:
    - arch_send_dest_ipi_mask -> send_dest_ipi_mask
    - arch_send_single_ipi   -> send_single_ipi

Tracked-On: #8799
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2025-09-19 13:56:21 +08:00
Yi Y Sun
aa3febbe26 hv: timer: rename functions to follow naming convention
For arch specific codes, we use arch_xxx() to name the function.
So, rename cpu_ticks/cpu_tickrate/set_hw_timeout/init_hw_timer
to follow this convention. Then, use arch interface to set timeout
value in update_physical_timer().

Furthermore, remove hw_timer.h and move its contents into common/
timer.h.

Tracked-On: #8792
Signed-off-by: Yi Y Sun <yi.y.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-17 08:55:12 +08:00
Haicheng Li
7573e436a5 hv: multi-arch reconstruct memory library
Split common and X86 arch specific codes.
For arch without specific memory library,add common library
to use.

Tracked-On: #8794
Signed-off-by: Haicheng Li <haicheng.li@linux.intel.com>
Co-developed-by: Haoyu Tang <haoyu.tang@intel.com>
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Signed-off-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-15 14:07:58 +08:00
Shiqing Gao
a5e46a70ff hv: smpcall: abstract a common SMP call framework
This patch:
 - abstracts the common logic from existing x86 implementation
 - moves x86-specific logic to arch/x86/notify.c

A new common/notify.{c,h} is introduced to provide a common SMP call framework for
multi-arch support in ACRN.
arch-specific files such as arch/{x86,riscv}/notify.c is aim to provide the
corresponding implementations respectively.

The framework provides the following common APIs:
 - init_smp_call(): initialize the SMP call support during pCPU initialization
 - handle_smp_call(): execute the SMP call notification handler
 - smp_call_function(): trigger the SMP call request to target pCPUs

Other SW modules should invoke these common APIs to perform arch-independent
SMP operations.

Two arch-specific hooks are abstracted:
 - arch_smp_call_kick_pcpu():
    - On x86, special handling is required when LAPIC is passthrough.
    - On RISC-V, a plain IPI is sufficient to kick the target pCPU.
 - arch_init_smp_call():
   - On x86, CPU initialization reserves dedicated vectors and
     registers callback handlers for purposes such as notifications
     or posted interrupts.
   - On RISC-V, no special handling is required at present; this
     can be extended in the future if needed.

----------
Changelog:
 * Merged the following two patches into one:
     [RFC PATCH v2 4/7] hv: introduce common/smp.{c,h}
     [RFC PATCH v2 5/7] hv: smpcall: x86: adapt to common SMP call
Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-09 16:37:04 +08:00
Shiqing Gao
066d55c8c3 hv: ipi: x86: rename send_single_ipi() and send_dest_ipi_mask()
Rename send_single_ipi() and send_dest_ipi_mask() to
arch_send_single_ipi() and arch_send_dest_ipi_mask() in x86, to make the
naming consistent with the RISC-V implementation and reflect that these
functions are arch-specific.

Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-09 16:37:04 +08:00
Shiqing Gao
89f0dc544c hv: ipi: x86: update send_dest_ipi_mask() prototype
Align the prototype of send_dest_ipi_mask() on x86 with the RISC-V
definition. dest_mask is updated from uint32_t to uint64_t:

    From: void send_dest_ipi_mask(uint32_t dest_mask, uint32_t vector)
    To:   void send_dest_ipi_mask(uint64_t dest_mask, uint32_t vector)

On RISC-V, send_dest_ipi_mask() is implemented using SBI interfaces,
where the dest_mask is defined as "unsigned long" in the SBI spec.

Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-09 16:37:04 +08:00
Yifan Liu
7559698b76 hv: Makefile: Separate x86 and common makefile
Currently ACRN supports only x86 architecture. And this patch is the
first of a series of patches to enable ACRN on multiple architecture.

This commit does the multi-arch of Makefile: put x86 specific content
into arch/x86/Makefile.

This includes:
- Pre-launched VM ACPI binary generation
- acrn.32.out generation (32 bit ELF was generated towards i386
  architecture)
- Customized modularization (*_MOD). Only one module is created in
  common section: COMMON_MOD
- Architecture specific make targets and pre-build actions are moved to
  architecture specific makefile. Introduce the following variable to
  register arch targets and/or actions:
  - ARCH_PRE_BUILD_TARGETS
  - ARCH_ALL_TARGETS
  - ARCH_INSTALL_TARGETS

Tracked-On: #8782
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-03 14:41:33 +08:00
Jiaqing Zhao
f9725dd334 hv: reserve hypervisor region in e820 table
Mark hypervisor memory region as unusable in its e820 table to avoid
being overlapped by e820_alloc_memory(). As it is already filtered out
in hypervisor e820 table, there is no longer need to filter it out in
service VM e820.

Tracked-On: #8738
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2025-08-19 07:49:23 +00:00