Commit Graph

596 Commits

Author SHA1 Message Date
Yifan Liu
134c5f6ab7 hv: vcpu: Move create_vcpu to common vcpu.c
Move vcpu API create_vcpu to common.

* Break create_vcpu into common vcpu init and arch_init_vcpu
  for arch-specific initialization.
* Move vcpu_thread to arch-specific and rename to arch_vcpu_thread

Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
2025-10-30 13:30:32 +08:00
Yifan Liu
688741074f hv: vm: Move vm common parts under common/vm.h (data structure)
This commit moves struct acrn_vm under common header vm.h, and move some
x86-specific members of struct acrn_vm into arch_vm. This commit focuses
on struct cleanup only. API cleanup will be in future patch series.

The affected members are:
e820_entry_num
e820_entries
wire_mode
wbinvd_lock
vlapic_mode_lock
vcpuid_entry_nr
vcpuid_level
vcpuid_xlevel
vcpuid_entries
reset_control
pm
sworld_control
sworld_snapshot
intr_inject_delay_delta

Moved to common vm.h:
ept_lock -> rename to stg2pt_lock
ept_pgtable -> rename to stg2_pgtable
nworld_eptp -> rename to root_stg2ptp
emul_mmio_lock
nr_emul_mmio_regions
emul_mmio
emul_pio

To avoid circular dependency, some in-header helpers are also moved into
common vm.h.

Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
2025-10-30 13:30:32 +08:00
hangliu1
a436f72493 hv: riscv: add access usr memory interface
Add pre_user_access() and post_user_access() interfaces
to protect mmio from hypervisor accidental access,
SMAP extensiton need to be detected

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
cf73187528 hv: multiarch: add arch specific set_pgentry
add pgtable callbacks set_pgentry to implement arch specific
set generic page table entry for any paging level, and remove
x86 specific tweak_exe_right/recover_exe_right callbacks, move
the logic in set_pgentry callback.

remove common set_pgentry function to avoid confusing.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
1ec40cd62f hv: multiarch: replace memset with sanitize_pte
for x86, when using a new page to set up page table,
sanitize to specific hpa page address is needed, however,
for other arch, sanitized to 0 is fine. To avoid duplicate memory
setting at the time of alloc_page and sanitize pte, replace
memset in alloc_page with sanitized pte operation.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
5dcf336ab3 hv: x86: move two functions back to x86
move early_pgtable_map_uart and pgtable_create_trusty_root
to x86 code, and provide calling with x86 private header
pagemisc.h

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
5cc6694eab hv: multiarch: move page table entry function
this patch moves function xx_offset and xx_index to common code,
Add arch interface arch_quirk/arch_pgtle_page_vaddr and
arch_pgtle_large.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
8be20c690b hv: multiarch: change to common page level
move _page_table_level to common, and rename functions and
variables to comform with pgtln style

when we refer to pgtl0e, it means the lowest translation
table entry, while the "pte" refers generic page table entry.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
6748f72d1b hv:multiarch: change main macro name
add x86 mm_common.h to map common macro name to x86 name
and chang them in common/mmu.c, replace XX_PFN_MASK with
PFN_MASK, since they are the same.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
c421a9557b hv:multiarch: move main memory interface to common
move below interface to common code.
pgtable_lookup_entry/pgtable_add_map/pgtable_modify_or_del_map

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
c911c3d38e hv: multiarch: move sanitize interface to common
The sanitized page is used to mitigate l1tf for x86, but sanitized_page_hpa
is the hpa used to set in the page table entry when delete or modify
page happens, it is by default is 0, other arch donot need to init it.
move this part to common for other arch to reuse it.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
2e4f5e79b7 hv:multiarch: move main memory structure to common
move struct pgtable and page_pool to common code and
move alloc_page/free_page/init_page_pool to common

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
hangliu1
2ab068400b hv: multiarch: move some function to common
move some funcitons like hpa2hva to common file.
change some files to include file from asm/pgtable.h to common/pgtable.h

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-21 14:14:55 +08:00
Fei Li
b26ef37519 log: move print_hv_banner as common
Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
ab32f6c033 config: add VMCS9900 CONFIG
Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-14 14:45:12 +08:00
Fei Li
83d56e0edb vm: add necessary dummy APIs
get_vm_from_vmid,is_paused_vm and is_poweroff_vm should be common APIs.
But now doesn't implement them as common for not introduce more VM related
data structure and APIs.

Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-10-14 14:45:12 +08:00
Xue Bosheng
034cccb7a4 hv: fix build issue in schedule module
change header file from asm/per_cpu.h to per_cpu.h in sched_noop.c and
sched_prio.c, remove return of sched_iorr_del_timer function.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Xue Bosheng
4875a4a919 hv: refine cpu dead and cpu idle implementation
cpu_dead calls arch_cpu_dead, cpu_do_idle calls arch_cpu_do_idle,
arch_cpu_dead and arch_cpu_do_idle are required to be implemented by
each architecture.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Xue Bosheng
ca63f62af3 hv: move run_idle_thread to schedule file
move run_idle_thread and default_idle to schedule file as common
function.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Xue Bosheng
e278b38ec4 hv: move percpu delivery mode and idle mode from common to x86
delivery mode and idle mode are x86 specific percpu, so move it from common to
x86 arch, also change the name of mode_to_idle to be idle_mode, change the name
of mode_to_kick_pcpu to be kick_pcpu_mode.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Xue Bosheng
974e8c63ea hv: refine make_reschedule_request in schedule module
add arch_send_reschedule_request, which is called by make_reschedule_request, for X86
arch_send_reschedule_request will call kick_pcpu, arch_send_reschedule_request is arch
public API, which is needed to be implemented by each architecture.

Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 12:31:07 +08:00
Yi Y Sun
6abe2e950c hv: riscv: build timer and softirq
This patch moves timer.c and softirq.c out from x86 to
make them be built for risc-v too.

Tracked-On: #8816
Signed-off-by: Yi Y Sun <yi.y.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-30 11:15:01 +08:00
Shiqing Gao
ca778139e6 hv: abstract IRQ related macros
Convert IRQ-related macros to static inline functions and introduce
wrappers for arch-specific implementations. This follows the style we
defined for multi-arch development.

This is a follow-up update for commit
a7239d126 ("[FIXME] hv: risc-v add denpended implementation in cpu.h").

CPU_IRQ_ENABLE_ON_CONFIG  -> local_irq_enable
CPU_IRQ_DISABLE_ON_CONFIG -> local_irq_disable
CPU_INT_ALL_DISABLE       -> local_irq_save
CPU_INT_ALL_RESTORE       -> local_irq_restore

Tracked-On: #8813
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
2025-09-29 14:01:00 +08:00
Jiaqing Zhao
5803232d83 hv: enable acrnlog in release builds
Enable acrnlog (memory logging) in release builds, default log level
is still controlled by DEBUG_OPTIONS/MEM_LOGLEVEL in scenario file.

Tracked-On: #8805
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
2025-09-25 16:30:26 +08:00
Jiaqing Zhao
015a97bfa8 hv: move sbuf_share_setup() and sbuf_reset() to common
acrntrace and hvlog depends on sbuf, as they are going to be included
in release versions, sbuf also need to be included.

Tracked-On: #8805
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
2025-09-25 16:30:26 +08:00
Jiaqing Zhao
2312472b1c hv: make acrntrace a common feature
Make acrntrace a common feature in both debug and release builds,
instead of debug-only. A new config option ACRNTRACE_ENABLED is added
in scenario to toggle this feature and it is enabled by default.

TRACE_6C is removed due to it violates "C-FN-20: Each function shall
have at most 6 parameters" coding rule and it is never used.

Tracked-On: #8805
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
2025-09-25 16:30:26 +08:00
Jian Jun Chen
e5831fec1e hv: multi-arch: abstract some pcpu related interfaces and macros
The following pcpu related interfaces are moved into common:
- common/cpu.c::start_pcpus
- include/common/cpu.h::get_pcpu_id
- include/common/cpu.h::set_current_pcpu_id
Their arch specific implementations are moved into arch/$(ARCH):
- arch/$(ARCH)/cpu.c::arch_start_pcpu
- include/arch/$(ARCH)/asm/cpu.h::arch_get_pcpu_id
- include/arch/$(ARCH)/asm/cpu.h::arch_set_current_pcpu_id
The following interface is moved into common:
- pcpu_set_current_state (from arch/x86/cpu.c -> common/cpu.c)
The following MACROs are moved into include/common/cpu.h:
- CPU_UP_TIMEOUT
- CPU_DOWN_TIMEOUT
- BSP_CPU_ID
- INVALID_CPU_ID

Tracked-On: #8791
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-23 11:30:38 +08:00
Haoyu Tang
a226b5f0ec hv: multi-arch reconstruct bits library
Extract common interface to include/lib/bits.h, and invoke the variant
implementation of arch.
Re-implement unlocked functions as C in common library.
Rename bitmap*lock() to bitmap*(), bitmap*nolock() to bitmap*non_atomic().

Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-22 10:52:06 +08:00
Haoyu Tang
286a7557bc hv: multi-arch reconstruct atomic library
extract common interface to include/lib/atomic.h,
and invoke the variant implementation of arch.

Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-22 10:52:06 +08:00
hangliu1
a72bd5e076 hv: multiarch: abstract pcpu related data from x86
Move phys_cpu_num and pcpu_active_bitmap to common, which could be
only accessed by interfaces provided by smp.h.

v2->v3:
1. move ALL_CPUS_MASK/AP_MASK to common cpu.h

v1->v2:
1. preserve phys_cpu_num in x86 but implement arch_get_num_available_cpus()
   to provide interface for common code to access.
2. change function name test_xx to check_xx

Tracked-On: #8801
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-19 15:04:55 +08:00
hangliu1
41f04b4e7a HV: abstract percpu structure from x86 arch
Move x86 architecture dependent per cpu data into a
seperate structure and embeded it in per_cpu_region.
caller could access architecture dependent member by
using prefix 'arch.'.

v2->v3:
move whose_iwkey, profiling_info and tsc_suspend to x86
v1->v2:
rebased on latest repo

Tracked-On: #8801
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Reviewed-by: Chen, Jian Jun<jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-19 15:04:55 +08:00
hangliu1
b5306f2a74 enable common code compile
enable riscv common file compile and add PAGE_SIZE
definition to make riscv compile pass.

Tracked-On: #8801
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-19 15:04:55 +08:00
Haicheng Li
f6bf0b809d risc-v: initial timer codes
This patch implements risc-v specific timer codes. Basically,
risc-v adapts to acrn timer framework with some specific
behaviors. So far, it enables sstc support in h-mode.

Tracked-On: #8792
Signed-off-by: Haicheng Li <haicheng.li@outlook.com>
Co-developed-by: Yong Li <yong.li@intel.com>
Signed-off-by: Yong Li <yong.li@intel.com>
Co-developed-by: Yi Y Sun <yi.y.sun@intel.com>
Signed-off-by: Yi Y Sun <yi.y.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-17 08:55:12 +08:00
Yi Y Sun
aa3febbe26 hv: timer: rename functions to follow naming convention
For arch specific codes, we use arch_xxx() to name the function.
So, rename cpu_ticks/cpu_tickrate/set_hw_timeout/init_hw_timer
to follow this convention. Then, use arch interface to set timeout
value in update_physical_timer().

Furthermore, remove hw_timer.h and move its contents into common/
timer.h.

Tracked-On: #8792
Signed-off-by: Yi Y Sun <yi.y.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-17 08:55:12 +08:00
Haicheng Li
7573e436a5 hv: multi-arch reconstruct memory library
Split common and X86 arch specific codes.
For arch without specific memory library,add common library
to use.

Tracked-On: #8794
Signed-off-by: Haicheng Li <haicheng.li@linux.intel.com>
Co-developed-by: Haoyu Tang <haoyu.tang@intel.com>
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Signed-off-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-15 14:07:58 +08:00
Shiqing Gao
a5e46a70ff hv: smpcall: abstract a common SMP call framework
This patch:
 - abstracts the common logic from existing x86 implementation
 - moves x86-specific logic to arch/x86/notify.c

A new common/notify.{c,h} is introduced to provide a common SMP call framework for
multi-arch support in ACRN.
arch-specific files such as arch/{x86,riscv}/notify.c is aim to provide the
corresponding implementations respectively.

The framework provides the following common APIs:
 - init_smp_call(): initialize the SMP call support during pCPU initialization
 - handle_smp_call(): execute the SMP call notification handler
 - smp_call_function(): trigger the SMP call request to target pCPUs

Other SW modules should invoke these common APIs to perform arch-independent
SMP operations.

Two arch-specific hooks are abstracted:
 - arch_smp_call_kick_pcpu():
    - On x86, special handling is required when LAPIC is passthrough.
    - On RISC-V, a plain IPI is sufficient to kick the target pCPU.
 - arch_init_smp_call():
   - On x86, CPU initialization reserves dedicated vectors and
     registers callback handlers for purposes such as notifications
     or posted interrupts.
   - On RISC-V, no special handling is required at present; this
     can be extended in the future if needed.

----------
Changelog:
 * Merged the following two patches into one:
     [RFC PATCH v2 4/7] hv: introduce common/smp.{c,h}
     [RFC PATCH v2 5/7] hv: smpcall: x86: adapt to common SMP call
Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2025-09-09 16:37:04 +08:00
Jiaqing Zhao
1c7e1a192b hv: refactor hypervisor image size helper function
The hypervisor image size is determined at link time, but now it is
calculated and stored in a global variable during mmu initialization,
and the helper function reads from that variable. Change to calculate
it inside helper function to avoid inconsistency.

Tracked-On: #8738
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2025-08-19 07:49:23 +00:00
Yuan Lu
95bfc87eec hv: hypercall: change condition for hcall_get_cpu_pm_state
After rebooting guest, CPPC initialization failed because _CST and _CPC
missed in DSDT table. When writing _CST and _CPC in DSDT table, it gets
cx_cnt or px_cnt as condition. Getting cx_cnt or px_cnt triggers
the hypercall hcall_get_cpu_pm_state. The hypercall hcall_get_cpu_pm_state
uses VM_CREATED as VM state's condition. While, after rebooting guest,
the VM state is VM_PAUSED when writing _CST and _CPC in DSDT table.
Therefore, changing VM state's condition from VM_CREATED to VM_CREATED or
VM_PAUSED for hcall_get_cpu_pm_state can solve the CPPC initialization
failed issue after rebooting guest.

Tracked-On: #8695
Signed-off-by: Yuan Lu <yuan.y.lu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2024-08-16 09:21:26 +08:00
YuanXin-Intel
e4b1584577 Change Service VM to supervisor role
1. Enable Service VM to power off or restart the whole platform even when RTVM is running.
2. Allow Service VM stop the RTVM using acrnctl tool with option "stop -f".
3. Add 'Service VM supervisor role enabled' option in ACRN configurator

Tracked-On: #8618

Signed-off-by: YuanXin-Intel <xin.yuan@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
2024-06-28 13:35:07 +08:00
nacui
512c98fd79 hv: trace: show cpu usage of vms in pcpu sharing case
To maximize the cpu utilization, core 0 is usually shared by service
vm and guest vm. But there are no statistics to show the cpu occupation
of each vm.

This patch is to provide cpu usage statistic for users. To calculate
it, a new trace event is added and marked in scheduling context switch,
accompanying with a new python script to analyze the data from acrntrace
output.

Tracked-On: #8621
Signed-off-by: nacui <na.cui@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Haiwei Li <haiwei.li@intel.com>
2024-06-28 12:55:23 +08:00
Haiwei Li
3d6ca845e2 hv: s3: add timer support
When resume from s3, Service VM OS will hang because timer interrupt on
BSP is not triggered. Hypervisor won't update physical timer because
there are expired timers on pcpu timer list.

Add suspend and resume ops for modules that use timers.

This patch is just for Service VM OS. Support for User VM will be added
in the future.

Tracked-On: #8623
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-06-27 11:26:09 +08:00
Haiwei Li
81935737ff hv: s3: reset vm after resume
Now only BSP is reset. After Service VM OS resumes from s3, APs'
apic_base_msr are incorrect with x2apic bit en.

To avoid incorrect states, do `reset_vm` after resume.

Tracked-On: #8623
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-06-27 11:26:09 +08:00
Jian Jun Chen
74bc2f7cfb hv: asyncio: support data match of the same addr
Virtio legacy device (ver < 1.0) uses a single PIO for all virtqueues.
Notifications from different virtqueues are implemented by writing
virtqueue index to the PIO. Writing different values to the same addr
needs to be mapped to different eventfds by asyncio. This is called
data match feature of asyncio.

v3 -> v4:
 * Update the definition of `struct asyncio_desc`
   Use `struct acrn_asyncio_info` inside it, instaed of defining the duplicated
   fileds.
 * Update `add_asyncio` to use `memcpy_s` rather than assigning all the fields
   using 5 assignment statements.
 * Update `asyncio_is_conflict` for coding style
   120-character line is sufficient to write all conditions.
 * Update the checks related to `wildcard`
   Because we require every conditional clause to have a Boolean type
   in the coding guideline.

v2 -> v3:
No change

v1 -> v2:
No change

Tracked-On: #8612

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Zhangwei6
ddfcb8c3fc hv: enable thermal lvt interrupt
This patch can fetch the thermal lvt irq and propagate
it to VM.

At this stage we support the case that there is only one VM
governing thermal. And we pass the hardware thermal irq to this VM.

First, we register the handler for thermal lvt interrupt, its irq
vector is THERMAL_VECTOR and the handler is thermal_irq_handler().

Then, when a thermal irq occurs, it flags the SOFTIRQ_THERMAL bit
of softirq_pending, This bit triggers the thermal_softirq() function.
And this function will inject the virtual thermal irq to VM.

Tracked-On: #8595

Signed-off-by: Zhangwei6 <wei6.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-05-16 09:40:32 +08:00
Zhang Chen
946a927dcb hv: sched: Fix scheduler priority issue
Fix build issue.

Tracked-On: #8586

Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-05-08 14:52:23 +08:00
Yi Sun
e0d03b27d0 hv: return error code for default case in hcall_vm_intr_monitor
In hcall_vm_intr_monitor(), the default case for intr_hdr->cmd is a
wrong case. So, it should return error code back. But it returns success
code 0 in current codes.

Tracked-On: #8580
Reviewed-by: Fei Li <fei1.li@intel.com>
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
2024-04-23 15:58:36 +08:00
Wu Zhou
925e3d95b4 hv: add max_len for sbuf_put param
sbuf_put copies sbuf->ele_size of data, and puts into ring. Currently
this function assumes that data size from caller is no less than
sbuf->ele_size.

But as sbuf->ele_size is usually setup by some sources outside of the HV
(e.g., the service VM), it is not meant to be trusted. So caller should
provide the max length of the data for safety reason. sbuf_put() will
return UINT32_MAX if max_len of data is less than element size.

Additionally, a helper function sbuf_put_many() is added for putting
multiple entries.

Tracked-On: #8547
Signed-off-by: Wu Zhou <wu.zhou@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-02-20 11:52:02 +08:00
Wu Zhou
581ec58fbb hv: vm_event: create vm_event support
This patch creates vm_event support in HV, including:
1. Create vm_event data type.
2. Add vm_event sbuf and its initializer. The sbuf will be allocated by
   DM in Service VM. Its page address will then be share to HV through
   hypercall.
3. Add an API to send the HV generated event.

Tracked-On: #8547
Signed-off-by: Wu Zhou <wu.zhou@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-02-01 17:01:31 +08:00
Qiang Zhang
79b91b339b hv: sched: add four parameters for BVT scheduler
Per BVT (Borrowed Virtual Time) scheduler design, following per thread
parameters are required to tune scheduling behaviour.
- weight
  The time sharing of a thread on CPU.
- warp
  Boost value of virtual time of a thread (time borrowed from future) to
  reduce Effective Virtual Time to prioritize the thread.
- warp_limit
  Max warp time in one warp.
- unwarp_period
  Min unwarp time after a warp.

As of now, only weight is in use to tune virtual time ratio of VCPU
threads from different VMs. Others parameters are for future extension.

Tracked-On: #8500
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Qiang Zhang <qiang4.zhang@intel.com>
2023-09-18 16:26:05 +08:00
Qiang Zhang
6a1d91c740 hv: sched: Add sched_params struct for thread parameters
Abstract out schedulers config data for vCPU threads and other hypervisor
threads to sched_params structure. And it's used to initialize per
thread scheduler private data. The sched_params for vCPU threads come
from vm_config generated by config tools while other hypervisor threads
need give them explicitly.

Tracked-On: #8500
Signed-off-by: Qiang Zhang <qiang4.zhang@intel.com>
2023-09-18 16:26:05 +08:00