Commit Graph

4 Commits

Author SHA1 Message Date
Tao Yuhong
84752ab229 Fix: HV: VM OS failed to assign new address to pci-vuart BARs
When wrong BAR address is set for pci-vuart, OS may assign a
new BAR address to it. Pci-vuart BAR can't be reprogrammed,
for its wrong fixed value. That can may because pci_vbar.fixed and
pci_vbar.type has overlap in abstraction, pci_vbar.fixed
has a confusing name, pci_vbar.type has PCIBAR_MEM64HI which is not
really a type of pci BARs.
So replace pci_vbar.type with pci_vbar.is_mem64hi, and change
pci_vbar.fixed to an union type with new name pci_vbar.bar_type.

Tracked-On: #5491
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2021-01-08 17:20:56 +08:00
Tao Yuhong
996e8f680c HV: pci-vuart support create vdev hcall
Add cteate method for vmcs9900 vdev in hypercalls.

The destroy method of ivshmem is also suitable for other emulated vdev,
move it into hcall_destroy_vdev() for all emulated vdevs

Tracked-On: #5394
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
2020-10-30 20:41:34 +08:00
Tao Yuhong
691abe90ff HV: vuart: send msi for pci vuart type
if vuart type is pci-vuart, then use MSI interrupt

split vuart_toggle_intr() control flow into vuart_trigger_level_intr() &
trigger_vmcs9900_msix(), because MSI is edge triggered, no deassertion
operation. Only trigger MSI for pci-vuart when assert interrupt.

Tracked-On: #5394
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-10-30 20:41:34 +08:00
Tao Yuhong
55b7fae67a HV: pci-vuart: pci based vuart emulation
Add emulation for pci based vuart device mcs9900 at hv land.
add struct pci_vdev_ops vuart_pci_ops, the vdev callbalks for vuart.

How to use
In misc/vm_configs/scenarios/<SCENARIO>/<BOARD>/pci_dev.c, add pci
vuart config to vm_pci_devs[] array. For example:

struct acrn_vm_pci_dev_config vm0_pci_devs[] = {
       /* console vuart setting*/
       {
               .emu_type = PCI_DEV_TYPE_HVEMUL,
               .vbdf.bits = {.b = 0x00U, .d = 0x04U, .f = 0x00U},
               .vdev_ops = &vmcs_ops,
               .vbar_base[0] = 0x80001000,	/* mmio bar */
               .vbar_base[1] = 0x80002000,	/* msix bar */
               .vuart_idx = 0,
       },
       /* communication vuart setting */
       {
               .emu_type = PCI_DEV_TYPE_HVEMUL,
               .vbdf.bits = {.b = 0x00U, .d = 0x05U, .f = 0x00U},
               .vdev_ops = &vmcs_ops,
               .vbar_base[0] = 0x80003000,
               .vbar_base[1] = 0x80004000,
               .vuart_idx = 1,
               .t_vuart.vm_id = 1U,
               .t_vuart.vuart_id = 1U,
       },
}

Tracked-On: #5394
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-10-30 20:41:34 +08:00