Commit Graph

1340 Commits

Author SHA1 Message Date
wenlingz
3effbb05a2 Revert "hv: vmsr: add IA32_MISC_ENABLE to msr store area"
This reverts commit 98b3d98ac5.
2019-03-26 13:59:21 +08:00
Li, Fei1
40168e73ee hv: vlapic: remove TPR set/get API
Since we always enable "Use TPR shadow", so operate on TPR will not
trigger VM exit. So remove these APIs.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-25 13:31:51 -07:00
Li, Fei1
4a683ed10e hv: vlapic: minor fix for update_msr_bitmap_x2apic_apicv
Shouldn't trap TPR since we always enable "Use TPR shadow"

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-25 13:31:51 -07:00
Binbin Wu
98b3d98ac5 hv: vmsr: add IA32_MISC_ENABLE to msr store area
Currently MSR IA32_MISC_ENABLE is passthrough to guest.
However, guest may change the value of this MSR, which will cause issue in hypervisor.
This patch uses VMX MSR store area to isolate the MSR IA32_MISC_ENABLE between guest and host.

TODO:
Some bits of the MSR IA32_MISC_ENABLE is not just per core, but per package.
So need to check if need to prevent guest from setting or clearing these bits that may affect other cores.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-22 13:32:01 +08:00
Binbin Wu
273381b372 hv: vmsr: rename msr_num to msr_index in struct msr_store_entry
Rename the field msr_num to msr_index, which is more accurate,
in struct msr_store_entry.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-22 13:32:01 +08:00
Mingqiang Chi
5585084c00 hv:move 'udelay' to timer.c
-- move this api from misc.c to timer.c to avoid
   reverse dependency, and remove misc.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-03-22 08:38:13 +08:00
Zide Chen
370998ba5a hv: replace MEM_2K with a new macro MAX_BOOTARGS_SIZE for bootargs size
- for all cases of referring guest bootargs size, replace MEM_2K with
  CONFIG_MAX_BOOTARGS_SIZE for better readability.
- remove duplicated MAX_BOOTARGS_SIZE definition from vm_config.h.

Also fix one minor issue in general_sw_loader() which uses copy_to_gpa()
to copy a string. Since copy_to_gpa() makes use of memncpy_s() to do the
job, the size parameter should include the string null ternimator.

Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-21 13:08:15 +08:00
Yan, Like
93ed2af165 hv: passthru TSC_ADJUST to VM with lapic pt
Linux access TSC_ADJUST to verify it has not tampered every time when enter idle.
So for RTVM running rt-linux, the access will cause vm exit which affect real-time performance.

This commit pass through TSC_ADJUST to VM with lapic_pt, to avoid TSC_ADJUST caused vm_exit.
For other VMs, TSC_ADJUST msr access is still trapped and emulated.

Tracked-On: #2813
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-03-20 13:35:28 +08:00
Binbin Wu
f32b59d73d hv: disable mpx capability for guest
This patch hide Memory Protection Extention (MPX) capability from guest.

- vCPUID change:
  Clear cpuid.07H.0.ebx[14]
  Clear cpuid.0DH.0.eax[4:3]
- vMSR change:
  Add MSR_IA32_BNDCFGS to un-supported MSR array.
- XCR0[4:3] is not allowed to set by guest.

Tracked-On: #2821
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 13:07:31 +08:00
Sainath Grandhi
b1cc18810e hv: Use domain/device specific invalidation for DMAR translation caches
ACRN uses global invalidation for all DMAR translation caches. Whenever
a UOS is shutdown or rebooted, it ends up clearing entries in translation
caches belonging to other VMs/domains. This patch adds support for
domain/device level invalidation for DMA translation caches and index
based invalidation for Interrupt Remapping Cache.

Tracked-On: #2738
Signed-off-by: Sainath Grandhi sainath.grandhi@intel.com
Acked-by: Eddie Dong eddie.dong@intel.com
2019-03-20 09:13:07 +08:00
Li, Fei1
e131d7059a hv: vmconfig: minor fix about regression of commit 79cfb1
commit 79cfb1 forgot to add GUEST_FLAG_ prefix for LAPIC_PASSTHROUGH
in file arch/x86/configs/dnv-cb2/partition_config.h

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-19 19:09:36 +08:00
Junjie Mao
9abd469da2 config: unify board names to lowercase
Currently board names are used inconsistently across the project.

* Name of defconfigs for various boards use lowercase.
* Directory of config files for various boards use lowercase.
* CONFIG_BOARD uses uppercase.

This confuses the configuration scripts and leads to unintended overwriting of
.config, as well as missing of board-specific headers during compilation because
the include paths are case-sensitive.

This patch converts the default board names to lowercase to resolve such
issues. Users are still free to define their own boards in either uppercase or
lowercase as long as they keep the cases consistent.

Tracked-On: #2794
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2019-03-19 19:08:59 +08:00
Zide Chen
5398c901f6 hv: remove CONFIG_PARTITION_MODE for pre-launched VM vE820 creation
Preparing for hybrid mode:

- create vE820 for pre-launched VMs and do other init code when the
  vm_config->type is PRE_LAUNCHED_VM.
- create ve820.c for each board because without wrapping by
  CONFIG_PARTITION_MODE, ve820_entry[] needs to be visible even when
  compiling target boards that haven't enabled pre-launched VMs.
- remove create_prelaunched_vm_e820() from vm.c and implement board
  specific function for each $(CONFIG_BOARD)/ve820.c. The reasons being:
  - don't need to define ve820_entry[32] for those boards that don't
    support pre-launched VMs.
  - more importantly, this makes it much easier to create different per-VM
    vE820 when it's needed.

Tracked-On: #2291
Signed-off-by: Zide Chen <zide.chen@intel.com>
2019-03-19 14:28:43 +08:00
Victor Sun
ca6e341147 HV: add vrtc for sharing mode
Previously vrtc is for partition mode only, now enable it for sharing mode;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-19 13:45:32 +08:00
Qi Yadong
1b79f28efe hv: update CR0/CR4 on demand in run_vcpu()
Suppose run_ctx.cr0/cr4 are correct when do world switching, so call
vcpu_set_cr0/cr4() to update cr0/cr4 directly before resume to guest.
This design is only for trusty world switching.

Tracked-On: #2773
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-19 09:57:08 +08:00
dongshen
19c5342506 HV: remove vdev ops for sharing mode
Remove vdev ops for sharing mode, directly call the corresponding functions
instead of calling the ops callbacks (indirectly)

Remove alloc_pci_vdev() and merge its code into init_vdev_for_pdev() to simplify code

Remove @pre for local variables

Change the return value from int32_t to void to comply with misra c and
add ASSERT in the functions (if necessary) to verify the assumptions for debug build:
 vmsi_init
 vmsix_init
 vmsi_deinit
 vmsix_deinit

Add @pre for vmsix_init_helper and make it a void function, use ASSERT to verify
the assumption for debug build.

Add ASSERT in get_sos_vm

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
Li, Fei1
79cfb1cf58 hv: vmconfig: format guest flag with prefix GUEST_FLAG_
To make the code more readable.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-16 17:14:12 +08:00
Li, Fei1
c018b853e9 hv: vmtrr: hide mtrr if hide_mtrr is true
Now we only configure "hide MTRR" explicitly to false for SOS. For other VMs,
we don't configure it which means hide_mtrr is false by default.
And remove global config MTRR_ENABLED

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-16 17:14:12 +08:00
Qi Yadong
21d3dc6863 hv: seed: refine header file
1. move seed_info structure from trusty.h to seed.h
2. replace "#include <hypervisor.h>" with necessary including headers
   in seed.c/seed_abl.c/seed_sbl.c

Tracked-On: #2777
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-15 14:09:56 +08:00
Qi Yadong
ff41c008ce hv: trusty: refine control registers switching method
Remove vmx_cr0/vmx_cr4 from ext_context structure, they are duplicated
with cr0/cr4 fields in run_context.
Switch cr0/cr4 of run_context structure on demand when do world switch.

Remove vmx_cr0_read_shadow/vmx_cr4_read_shadow from ext_context structure.
These fields should be same for both normal world and secure world.

Tracked-On: #2773
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-15 10:08:25 +08:00
Zide Chen
518a82d80b hv: cleanup some hva/hpa conversion code
The init page tables installed in either cpu_primary.S or trampoline.S
are 1:1 mapping and won't be changed in the future.

The 'actual' hypervisor page table installed in enable_paging() is 1:1
mapping currently but it could be changed in the future. Both hva2hpa() and
hpa2hva() are implemented based on these page tables and can't be used
when the init page tables take effect.

This patch does the following cleanup:

- remove all hva2hpa()/hpa2hva() before calling enable_paging()
- get_hv_image_base() returns HVA, not HPA. So add hva2hpa() for all cases
  that are called afte enable_paging().

Tracked-On: #2700
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2019-03-15 09:03:14 +08:00
Binbin Wu
74023a9a75 hv: vtd: check bus number when assign/unassign device
Input parameter "bus" of assign_iommu_device/unassign_iommu_device may be from hypercall.
And the conext tables are static allocated according to CONFIG_IOMMU_BUS_NUM.
Need to check the bus value to avoid access invalid memory address with invalid value.

Tracked-On: #2743
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-14 13:07:59 +08:00
Qi Yadong
95d1e40283 hv: refactor seed management
New component to maintain seed retrieval and derivation: seed.

1. Retrieve seed from bootloader in Hypervisor's boot stage.
2. Derive virtual seed for Guest/Trusty if need.

Tracked-On: #2724
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Reviewed-by: Zhu Bing <bing.zhu@intel.com>
2019-03-14 10:38:17 +08:00
Arindam Roy
3158c851ae HV: Modularize boot folder
In order to remove the usage of hypervisor.h,
modularize the boot folder.
Current changes include modifications to remove
usage of acrn_vm structure pointer, from some of
the call, and remove calls to hypervisor.h,
as and when deemed fit.

Removed hva2gpa, as this was not used anywhere else
after the changes.

Tracked-On: #2694
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-14 09:05:53 +08:00
Jason Chen CJ
286731d9d1 hv:move instr_emul_ctxt instance to struct vcpu
move instr_emul_ctxt instance from struct per_cpu_region
to struct vcpu, and rename it from g_inst_ctxt to inst_ctxt

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 14:04:20 +08:00
Mingqiang Chi
5331b39520 hv:remove 'cpu_mode' from struct vm_guest_paging
now the 'cpu_mode' is unused in struct vm_guest_paging,
and there is the  same variable in struct acrn_vcpu_arch

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 14:04:20 +08:00
Tw
ce387084ed hv: remove CONFIG_PLATFORM_[SBL|UEFI] and UEFI_STUB
ACRN now has unified the way to handle SBL and UEFI.
so just remove corresponding macros in Kconfig.
BTW, default configuration in Kconfig is for UEFI boards.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Tw
334382f9ef efi-stub: minor change for uefi refactor
Include these changes:
- substitute efi_context with uefi_context
- remove EFI_STUB from Kconfig
- remove EFI_

Signed-off-by: Tw <wei.tan@intel.com>
2019-03-13 10:26:55 +08:00
Tw
9b24620e16 hv: merge SBL and UEFI related stuff under boot
This patch mainly unifies init_vm_boot_info's implementation between SBL and
UEFI.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Tw
56d8b08b78 hv: merge SBL and UEFI related stuff under bsp
This patch unifies the bsp interface between UEFI and SBL.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Li, Fei1
78890622b2 hv: vlapic: minor fix about detect_apicv_cap
detect_apicv_cap should used to detect all the APICv capabilities. Besides,
"Virtualize x2APIC mode" doesn't depend on "APIC-register virtualization".
We shouldn't check "Virtualize x2APIC mode" support only when physical platform
supports "APIC-register virtualization"

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-12 20:37:06 +08:00
Li, Fei1
f769f7457b hv: vlapic: add combined constraint for APICv
Add two functions to combine constraint for APICv:
is_apicv_basic_feature_supported: check the physical platform whether support
"Use TPR shadow", "Virtualize APIC accesses" and "Virtualize x2APIC mode"
is_apicv_advanced_feature_supported: check the physical platform whether support
"APIC-register virtualization", "Virtual-interrupt delivery" and
"Process posted interrupts".

If the physical platform only support APICv basic feature, enable "Use TPR shadow"
and "Virtualize APIC accesses" for xAPIC mode; enable "Use TPR shadow" and
"Virtualize x2APIC mode" for x2APIC. Otherwise, if the physical platform support
APICv advanced feature, enable APICv feature for xAPIC mode and x2APIC mode.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-12 20:37:06 +08:00
Kaige Fu
2b74e1a91e HV: PAE: Add stac()/clac() in local_gva2gpa_pae
Accessing memory of guest will cause page fault when SMAP is enabled.
This patch stac()/clac() correspondingly to get rid of this situation.

Tracked-On: #2713
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-12 09:28:35 +08:00
Sainath Grandhi
137892fdd5 hv: Remove multiple definitions for dmar translation structures
Except for few translation structures in x86 IOMMU, all translation
structures are 128-bit. All the translation structures used by ACRN
are 128 bit. So removed multiple definitions and defined a struct
that accomodates 128 bit entries.

Tracked-On: #2668
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-08 15:23:20 +08:00
Zide Chen
bf1aa5c134 hv: destroy IOMMU domain after vpci_cleanup()
In partition mode, unassign_iommu_device() is called from vpci_cleanup(),
so when shutdown_vm() is called, unassign_iommu_device() could fail because
of "domain id mismatch" and DMAR is not cleared.

Also move destroy_ept() after the call to destroy_iommu_domain().

Tracked-On: #2700
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-08 13:20:11 +08:00
yuhong.tao@intel.com
c0400b99fb HV: Fix modularization vm config code lost CAT code
Previous change 'HV: modularization vm config code', commit id
1bb15c64a6, lost CAT code when move
sanitize_vm_config() from vm.c to vm_config.c

Tracked-On: #2291
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2019-03-08 12:38:48 +08:00
Victor Sun
649406b049 HV: refine location of platform_acpi_info header
platform_acpi_info.h should be BOARD specific so move the header file
to configs/$(CONFIG_BOARD)/ folder.

So the target acpi info file detect process is:

Compiler search for $(CONFIG_BOARD)_acpi_info.h under
hypervisor/arch/x86/$(CONFIG_BOARD)/ first (the file is supposed to be
generated by offline tool so it is not included in original source), if
found, then the file is the target acpi info file. If not and at the
same time the ENFORCE_VALIDATED_ACPI_INFO Kconfig was set, the compiler
will stop and hint user to add target acpi info file by offline tool.
If ENFORCE_VALIDATED_ACPI_INFO was unset, then compiler will continue to
search for platform_acpi_info.h as target acpi info file under
hypervisor/arch/x86/$(CONFIG_BOARD) folder (with this file we could bypass
ENFORCE_VALIDATED_ACPI_INFO check and benifit for development). If this
file is not exist, then hypervisor/arch/x86/configs/platform_acpi_info.h
will be included as final target acpi info.

The process should work for UEFI path also, with a valid platform acpi
info file, S3/S5 should work on UEFI platform.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-08 10:34:14 +08:00
Mingqiang Chi
55f52978db hv:move several tsc APIs to timer.c
-- change 'tsc_khz' to static
-- move these APIs from rtl.h to timer.c
   us_to_ticks()
   ticks_to_us()
   ticks_to_ms()
   rdtsc()

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-07 20:23:22 +08:00
Minggui Cao
9922c3a7f5 HV: correct COM_IRQ default config type
change the config type of COM_IRQ from "hex" to "int"; make
it consistent with its default value.

Tracked-On: #2689
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-03-07 17:52:56 +08:00
Yan, Like
741501c2e3 hv: refine vlapic_calc_dest()
This commit extracts the common logic of vlapic_calc_dest() and vlapic_calc_dest_lapic_pt()
to static inline functions, in order to make vlapic_calc_dest() clean and easy to read.

Tracked-On: #1842
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-03-06 11:43:51 +08:00
Li, Fei1
ca3d4fca55 hv: vlapic: move LVT IRQ vector check to vlapic_fire_lvt
We could simple the vector check for LVT IRQ by move this check to
vlapic_fire_lvt when the IRQ is fixed mode.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-05 13:33:36 +08:00
Li, Fei1
473d31c073 hv: vlapic: add vector check for x2apic SELF IPI
Set when the local APIC detects an illegal vector (one in the range 0 to 15)
in the message that it is sending. This occurs as the result of a write to the
ICR (in both xAPIC and x2APIC modes) or to SELF IPI register (x2APIC mode only)
with an illegal vector.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-05 13:33:36 +08:00
Li, Fei1
e5d3a49894 hv: vlapic: call vlapic_accept_intr directly in vlapic_set_error
LVT ERROR is an edge and fixed mode interrupt. We could call vlapic_accept_intr
to fire it directly. Otherwise, if LVT ERR vector is invalid, an invalid
interrupt will be accepted in IRR.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-05 13:33:36 +08:00
Zide Chen
2b35c07857 hv: do EPT mapping only for physical memory backed GPA on pre-launched VMs
Currently for pre-launched VMs, HV intends to do EPT mapping for all GPA
space, which implies that it wastes HPA to back PCI hole and other vE820
entries that are not backed by physical memory.

This patch solves this issue and fixes ve820 entries whose length is not
aligned to 4K, and changes the lowmem entry's start GPA from 1MB to 2MB.

Tracked-On: #2587
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-05 10:05:24 +08:00
Shiqing Gao
da14c96135 hv: simplify get_primary_vcpu and vcpu_from_vid
This patch simplifies `get_primary_vcpu` and `vcpu_from_vid`.
The target_vcpu could be get from the index directly.

Tracked-On: #1842
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-04 13:45:02 +08:00
Li, Fei1
3d0d8609cc hv: vlapic: correct wrong use of vector
Correct wrong use of vector where lvt_index should be used.

Tracked-On: #1842
Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-04 13:44:15 +08:00
Xinyun Liu
0943a836bd [hv] set ECX.bit31 to indicate the presence of a hypervisor
ECS.bit31 is not used and always return 0 in SDM Vol.2A 3-195. It's a
standard way to indicate whether there is a hypervisor.

Tracked-On: #2490
Ref: https://lwn.net/Articles/301888/
Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-04 13:43:48 +08:00
Sainath Grandhi
b49df10a23 hv: Remove redundant get_dmar_info API calls
get_dmar_info API is called from multiple functions in vtd.c. This patch
calls get_dmar_info once during init and uses the cached info during
runtime.

Tracked-On: #2657
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-02 07:10:25 +08:00
Mingqiang Chi
308d4e8c4e hv:move forward the initialization for iommu & ptdev
move 'init_iommu()' & 'ptdev_init()' before starting
all secondary cores to avoid access uninitialized resource
in partition mode.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-02 07:10:12 +08:00
Victor Sun
ff65a10391 HV: vm_configs array refinement
- merge sharing_config.c and partition_config.c to vm_config.c;

- make vm_configs[] static;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 10:32:49 +08:00