Commit Graph

11 Commits

Author SHA1 Message Date
Jason Chen CJ
2ff7bf826e page walk during copy_from_vm/copy_to_vm
there are data transfer between guest(GPA) & hv(HPA), especially for
hypercall from guest.

guest should make sure these GPAs are address continous, but hv cannot
assure HPAs which mapped to these GPAs are address continous, for example,
after enable hugetlb, a contious GPA range could come from two different
2M pages.

this patch is handling such case by doing gpa page walking during
copy_from_vm & copy_to_vm.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 13:42:19 +08:00
Binbin Wu
744e09bc7e hv: define 4 vcpu modes
move enum vm_cpu_mode to guest.h
move enum vm_paging_mode to guest.h
replace REAL_MODE with CPU_MODE_REAL
replace PAGE_PROTECTED_MODE with CPU_MODE_64BIT

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 10:16:48 +08:00
Victor Sun
99189b4e48 HV: cleanup for io request related functions
Changes:
  1. Move io request related functions from hypercall.c to io_request.c
     since they are not hypercalls;
  2. Remove acrn_insert_request_nowait() as it is never used;

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 16:36:33 +08:00
Li, Fei1
9dd7d27737 hv: vlapic_timer: refine vlapic tscdeadline timer
Add vlapic_create_timer/vlapic_reset_timer to setup/reset a timer.
Add vlapic_update_lvtt to disarm timer when mode changes.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
lijinxia
b3dd135ed3 Revert "HV: added memory allocation functions for AP trampoline code relocation"
This reverts commit 41b83bb20b.
2018-05-15 17:25:58 +08:00
Zide Chen
ceb3076b69 HV: added memory allocation functions for AP trampoline code relocation
V2->V3: Fixed the booting issue on MRB board and removed the restriction
        of allocate memory from address 0

1) Fix the booting from MRB issue
-#define    CONFIG_LOW_RAM_SIZE 0x000CF000
+#define    CONFIG_LOW_RAM_SIZE 0x00010000

2) changed e820_alloc_low_memory() to handle corner case of unaligned e820 entries
  and enable it to allocate memory at address 0
+		a length = end > start ? (end - start) : 0;

-       /* We don't want the first page */
-       if ((length == size) && (start == 0))
-           continue;

3) changed emalloc_for_low_mem() to enable to allocate memory at address 0
-       /* We don't want the first page */
-       if (start == 0)
-           start = EFI_PAGE_SIZE;

V1->V2: moved e820_alloc_low_memory() to guest.c and added the logic to
        handle unaligned E820 entries

emalloc_for_low_mem() is used if CONFIG_EFI_STUB is defined.
e820_alloc_low_memory() is used for other cases

In either case, the allocated memory will be marked with E820_TYPE_RESERVED

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:58 +08:00
Jason Chen CJ
a1c6c24248 vm load: add SOS cmdline option for hugetlb
adding "hugepagesz=1G" and "hugepages=X" into SOS cmdline, for X, current
strategy is making it equal
	e820_mem.total_mem_size -CONFIG_REMAIN_1G_PAGES
if CONFIG_REMAIN_1G_PAGES is not set, it will use 3 by default.

CONFIG_CMA is added to indicate using cma cmdline option for SOS kernel,
by default system will use hugetlb cmdline option if no CONFIG_CMA defined.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:56 +08:00
Yonghua Huang
bb011a4316 rename vmexit handlers
this patch is to align the suffix of the handlers' name.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:55 +08:00
Yin Fengwei
4073b37369 hv: microcode: Enable microcode update from SOS.
microcode update from UOS is disabled.
microcode version checking is available for both SOS and UOS.

There are two TODOs of this patch:
1. This patch only update the uCode on pCPUs SOS owned. For the
   pCPUs not owned by SOS, the uCode is not updated. To handle
   this gap, we will have SOS own all pCPUs at boot time. So
   all pCPUs could have uCode updated. This will be handled
   in the patch to enable SOS own all pCPUs at boot time.

2. gva2gpa now doesn't check possible page table walk failure.
   Will add the failure check in gva2gpa in different patch.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Anthony Xu (anthony.xu@intel.com)
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:19:37 +08:00
Minggui Cao
119b038551 to support firmware & ramdisk as multiboot mods
1. refine multiboot related code, move to /boot.
2. firmware files and ramdisk can be stitched in iasImage;
and they will be loaded as multiboot modules.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-05-15 17:19:37 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00