Commit Graph

31 Commits

Author SHA1 Message Date
Li Fei1
26670d7ab3 hv: vpci: revert do FLR and BAR restore
Since we restore BAR values when writing Command Register if necessary. We don't
need to trap FLR and do the BAR restore then.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2019-12-30 13:43:07 +08:00
Li Fei1
a90e0f6c84 hv: vpci: restore PCI BARs when doing PCIe FLR
ACRN hypervisor should trap guest doing PCIe FLR. Besides, it should save some status
before doing the FLR and restore them later, only BARs values for now.
This patch will trap guest Device Capabilities Register write operation if the device
supports PCI Express Capability and check whether it wants to do device FLR. If it does,
call pdev_do_flr to do the job.

Tracked-On: #3465
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2019-12-23 10:14:37 +08:00
Mingqiang Chi
5585084c00 hv:move 'udelay' to timer.c
-- move this api from misc.c to timer.c to avoid
   reverse dependency, and remove misc.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-03-22 08:38:13 +08:00
Mingqiang Chi
55f52978db hv:move several tsc APIs to timer.c
-- change 'tsc_khz' to static
-- move these APIs from rtl.h to timer.c
   us_to_ticks()
   ticks_to_us()
   ticks_to_ms()
   rdtsc()

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-07 20:23:22 +08:00
Mingqiang Chi
229fbdd81d hv:cleanup header file for vcpu.c & vcpu.h
For vcpu.c and vcpu.h,only include some necessary
header files, doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:50:42 +08:00
Mingqiang Chi
3d878a9123 hv:cleanup header file for vm.c & vm.h
-- now hypervisor.h is the universal set of header file,
   this patch doesn't include hypervisor.h, only include
   some necessary header files for vm.c and vm.h
-- move 'struct vcpuid_entry' from vm.h to vcpuid.h
-- remove dead code 'enum vm_privilege_level'
-- move 'enum vpic_wire_mode' from vm.h to vpic.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:50:42 +08:00
Minggui Cao
808d0af2c8 HV: check to avoid interrupt delay timer add twice
to edge interrupt, like eth device, it can triger the interrupt again
when its IRQ in softirq entry queue or in timer list.

in current design, for sofrirq entry, it calls "list_del" before
"list_add_tail", to avoid the entry added twice.

so for interrupt delay timer, add to check if it is started
then just drop the next one; to avoid it enqueue twice.

Tracked-On: #2365
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2019-01-21 11:18:08 +08:00
Jason Chen CJ
59e3f562b8 remove check_tsc
there is no need to clear CR4.TSD as there is no user mode
in ACRN hypervisor.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-17 14:31:52 +08:00
Li, Fei1
e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Li, Fei1
5fd6021dee doc: hv: add comments to timer APIs for documentation
This patch adds more comment to describe functions that are
interfaces to the other modules in the hypervisor. The comments
are in doxygen-style for document generation.

Tracked-On: #1595
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-04 15:09:47 +08:00
Huihuang Shi
c5f4c5109c HV:fix type related violations
1.Function return type inconsistent
2.cast on a constant value

V1->V2 add () to return type
V2->V3 keep the sbuf_get and sbuf_put return code

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-10 13:02:00 +08:00
Wei Liu
67ff326e14 hv: retain the timer irq
Timer IRQ was static mapped IRQ.
It should not be cleaned up when one of the cpu dead.
The patch will retain the timer irq.

Tracked-On: #1359
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 16:39:36 +08:00
Minggui Cao
918403f925 HV: modify code for intr storm detect & handling
This patch is to enhance the feature of "interrupt storm
mitigation"; when interrupt storm happens on one UOS
it should keep as smaller effect to SOS as possible.

Add variables in PTdev entry & VM, used to record one
UOS's pass-thru devices' interrupt data; add a function
to collect the data.

Also add a timer used to delay UOS pass-thru devices'
interrupt injection if an "interrupt storm" detected
by SOS.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-25 11:09:35 +08:00
Mingqiang Chi
40fd8893b4 hv:fixed several return value violations
-- change two timer callbacks to void type
-- ignore the return value for add_timer
-- add (void) before several functions(memset/memcpy/
   vcpu_get_xxx)

v1-->v2:
   ignore the return value for add_timer
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-20 09:51:07 +08:00
Shiqing Gao
fd0c9187ef hv: treewide: fix 'Procedure parameter has a type but no identifier'
Add the parameter identifier for typedef function pointer.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-03 13:29:24 +08:00
Li, Fei1
457ecd6ef7 hv: softirq: refine softirq
1. add register_softirq to register a softirq handler
2. rename exec_softirq to do_softirq; raise_softirq to fire_softirq.
3. in do_softirq call registered softirq handler not call
the device softirq handle function directly
4. enable irq after vm exit and disable irq after the first
call do_softirq before vm enter.
5. call do_softirq again when irq disabled to handle the risk
unhandled softirq.
6. rename SOFTIRQ_DEV_ASSIGN to SOFTIRQ_PTDEV
7. remove SOFTIRQ_ATOMIC

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-01 11:36:27 +08:00
Xiangyang Wu
3446e84ea5 HV:treewide:rename struct timer as struct hv_timer
The variable timer's name is identical with struct
timer s name. This MISRA C violation is detected
by static analysis tool.
According to naming convention rule: If the data
structure type is used by multi modules, its
corresponding logic resource is only used by
hypervisor/host and isn't exposed to external
components (such as SOS, UOS), its name meaning
is simplistic (such as timer), its name needs prefix
"hv_".

Rename struct timer as struct hv_timer.
Replace regular expression:s/struct timer\([ ),;\t\*]\+\)
/struct hv_timer\1

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-30 10:16:36 +08:00
Xiangyang Wu
3027bfab10 HV: treewide: enforce unsignedness of pcpu_id
In the hypervisor, physical cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about  physical cpu id (pcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

In this patch, define physical cpu id as "uint16_t" type for all
modules in the hypervisor and change related codes. The valid
range of pcpu_id is 0~65534, INVALID_PCPU_ID is defined to the
invalid pcpu_id for error detection, BROADCAST_PCPU_ID is
broadcast pcpu_id used to notify all valid pcpu.

The type of pcpu_id in the struct vcpu and vcpu_id is "int" type,
this will be fixed in another patch.

V1-->V2:
    *  Change the type of pcpu_id from uint32_t to uint16_t;
    *  Define INVALID_PCPU_ID for error detection;
    *  Define BROADCAST_PCPU_ID to notify all valid pcpu.

V2-->V3:
    *  Update comments for INVALID_PCPU_ID and BROADCAST_PCPU_ID;
    *  Update addtional pcpu_id;
    *  Convert hexadecimals to unsigned to meet the type of pcpu_id;
    *  Clean up for MIN_PCPU_ID and MAX_PCPU_ID, they will be
       defined by configuration.
Note: fix bug in the init_lapic(), the pcpu_id shall be less than 8,
this is constraint by implement in the init_lapic().
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 16:59:21 +08:00
Huihuang Shi
fe0314e8c3 HV:header:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Huihuang Shi
977c4b20b5 fix parted of "missing for discarded return value"
MISRA C required that return value should be used, missing for it should
add "(void)" prefix before the function call.
Some function can be declared without return value to avoid this problem.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 16:21:45 +08:00
Huihuang Shi
e591315a65 HV:treewide:C99-friendly per_cpu implementation change the per_cpu method
The current implementation of per_cpu relies on several non-c99 features,
and in additional involves arbitrary pointer arithmetic which is not MIS-
RA C friendly.

This patch introduces struct per_cpu_region which holds all the per_cpu
variables. Allocation of per_cpu data regions and access to per_cpu vari-
ables are greatly simplified, at the cost of making all per_cpu varaibl-
es accessible in files.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-06-05 17:09:00 +08:00
David B. Kinder
f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Li, Fei1
5df2efad4a hv: timer: make the timer list be ordered
make the timer list be ordered to speed up expried timer
process and next timer event finding.

Add timer would not schedule timer unless it's the next
timer event.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zide Chen
260b37a52f HV: Fix the missing list_head initializaiton
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:25:58 +08:00
Li, Fei1
ac253f8c60 hv: timer: add periodic timer setup support
and add MIN_TIMER_PERIOD_US for limit periodic timer frequency.
Now it's set to 500 us.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:25:56 +08:00
Li, Fei1
9bfa574a27 hv: timer: restruct add_timer/del_timer API
add initialize_timer to initialize or reset a timer;
add_timer add timer to corresponding physical cpu timer list.
del_timer delete timer from corresponding physical cpu timer list.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:25:56 +08:00
Li, Fei1
be9f4ee9e6 hv: timer: pass timer callback function parameter by pointer
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:56 +08:00
Li, Fei1
dace32eca1 hv: timer: add calibrate tsc hz by cpuid 0x15
Get tsc hz by cpuid 0x15 if we supported, otherwise
calibrate tsc by pit timer.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:56 +08:00
Li, Fei1
7f4332f539 hv: timer: rename cpu/cpu_id to pcpu_id
timer is physical cpu related.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong>
2018-05-15 17:25:56 +08:00
Minggui Cao
9dbcf7afaf remove deadcode of timer
the code is used to debug before, not used now.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:56 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00