Commit Graph

7 Commits

Author SHA1 Message Date
Victor Sun
0ba8434838 acrn-config: rename CONFIG_MAX_PCPU_NUM to MAX_PCPU_NUM
The macro definition is changed in hypervisor code, so modify acrn-config
side accordingly.

Tracked-On: #4230

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-12-12 13:49:28 +08:00
Wei Liu
67b416d523 acrn-config: hide non-legacy serial port as SOS console
SOS vm only support legacy serial port emulation, so we need to
hide non-legacy serial ports from webUI when user want to select
serial port as SOS console.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-12-12 10:46:02 +08:00
Wei Liu
deb5ed1f76 acrn-config: unify get_vuart_info_id api in config tool
1. unify get_vuart_info_id/get_vuart_id api in board/scenario/launch
config tool.
2. if vm use 'vuart1(tty)' method to power off, make sure this vm have
select the vuart1 'SOS_COM2_BASE'.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-12-12 10:46:02 +08:00
Wei Liu
b332bf84b8 acrn-config: enhance the board config that has no serial port
There may be no physical serial port in the target board, and it will
stop generating board file, the patch add support to handle such case.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-11-20 10:01:24 +08:00
Wei Liu
ad9f424ce5 acrn-config: generate proper msr_index value for CLOS
Since msr_index relys on the MSR_IA32_L2_QOS_MASKn(n:max to 3)
macro which defined in hv source code, generate array that CLOS number
more than 4 means need define more than 4 macro.
This patch solve such issue by using MSR_IA32_L2/L3_MASK_BASE with the
msr index offset.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-11-08 16:43:08 +08:00
Wei Liu
ee66a94ccf acrn-config: grab Processor CPU number from board information
The value of CONFIG_MAX_PCPU_NUM is stands for Processor CPU number and
it is grabed from board information.

Tracked-On: #3798
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-10-12 16:22:27 +08:00
Wei Liu
28d1b909e6 acrn-config: generate a scenario patch and apply to acrn-hypervisor
1.the script will parse the the board information which already
generated, $(scenario).xml modified by user, generate scenario
vm configuration and apply to the acrn-hypervisor source code base.

2.parse cpu/memory/ttys/rootfs information from native os and store it to
the source code

3.implemnt scenario_config and it's usage

usage: scenario_cfg_gen.py --board <board_info_file> -scenario <scenario_info_file>
board_info_file :  file name of the board info
scenario_info_file :  file name of the scenario info

sample:
	$ python3 scenario_cfg_gen.py --board ../board-xmls/apl-mrb.xml
--scenario ../config-xmls/scenarios/sdc.xml

Also improvement board config generate usage:
sample:
	$ python3 board_cfg_gen.py --board ../board-xmls/apl-mrb.xml
--scenario ../config-xmls/scenarios/sdc.xml

V1-V2:
    1). parse board_setting.xml was removed as these configuration will be
stitch into scenario configuration
    2). parse console for different formats
    3). parse epc sections
    4). add logical partition rootfs
    5). support to parse clos, while webui set to None type
    6). support to parse bootargs, while webui set to nul
    7). convert '-' to '_' for pci sub class name while generating source file

Tracked-On: #3602
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2019-09-16 09:34:37 +08:00