Commit Graph

23 Commits

Author SHA1 Message Date
Yonghua Huang
c8dc56e08b Add APIC ACCESS VMexit handler
Update 'apic_access_exit_handler()' function to emulate
guest instruments to read/write guest's lapic registers page

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-03-21 15:34:25 -07:00
Yonghua Huang
7ce4248e34 Add handle EOI case when APIC-write VM exit
-If "virtual-interrupt delivery" VM-execution control is 0,
  Processor will causes an APIC-write VM exit if page offset
  is 0xB0 (EOI), SDM Vol3, Chapter 29.4.3

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-03-21 15:34:25 -07:00
Jason Chen CJ
d1237e81f0 uefi: init vlapic according to native lapic
this patch save native lapic configuration and restore it to vm0's vlapic
before its running, then doing hpet timer interrupt injection through vlapic
interface -- this will not mess up vlapic and we can see hpet
timer interrupt coming continuously.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-03-21 12:14:01 +08:00
Jason Chen CJ
9f3c723d0a uefi: remove old interrupt injection method
we added uefi stub for hv, and want vm0 continue running under uefi env to
boot other uefi payload (osloader or bzImage).

during this, the uefi timer irq need be handled elegantly.

there are 3 types for uefi timer:
1. 8254 based on IRQ0 of PIC
2. HPET based on IOAPIC
3. HPET based on MSI

currently, we only support type 3 (HPET+MSI). But we are following a
in-correct flow to handle this timer interrupt:
- we set VMX_ENTRY_INT_INFO_FIELD directly if a timer interrupt happened
  before vcpu launching, this will make its vlapic mess up, which finally
  cause hpet timer stop.

this patch remove this in-correct approach, the new approach patch will
be followed by next patch.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-03-21 12:14:01 +08:00
Mingqiang Chi
db93d80358 mmu: Rename several variables related to page table type
rename 'PT_HOST' to 'PTT_HOST'
rename 'PT_EPT' to 'PTT_EPT'
rename 'ept_type' to 'table_type'

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-20 16:44:53 +08:00
Zheng, Gen
a0b206ba3c vm load: fix bug in loading kernel
According to the explaination for pref_address
in Documentation/x86/boot.txt, a relocating bootloader
should attempt to load kernel at pref_address if possible.
But due to a non-relocatable kernel will unconditionally
move itself and to run at perf address, no need to copy
kernel to perf_address by bootloader.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-03-20 15:52:53 +08:00
Jason Chen CJ
6d6e10484f ptdev: fix bug when update ptdev entry
info->phys_pin need be used by ptdev_build_native_rte when updating entry

TODO: currently ptdev entry is virtual based, the better solution should
be physical based.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-03-20 14:37:08 +08:00
Zhao Yakui
ab10b950e2 Jmp to vm_exit directly to avoid calling vmlaunch again if vm-entry fails in vmresume
It is possible that the vm-entry fails in vmresume instr under some scenarios.
It will pass to next instruction following vmresume. In such case it will call
the vmlaunch again.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2018-03-20 14:36:41 +08:00
Mingqiang Chi
2a298fad3f Remove unnecessary variable in map_mem
the variable 'table_present' is redundant
in function(map_mem_region)

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-20 14:36:13 +08:00
Minggui Cao
7013b06c6c to support firmware & ramdisk as multiboot mods
1. refine multiboot related code, move to /boot.
2. firmware files and ramdisk can be stitched in iasImage;
and they will be loaded as multiboot modules.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-03-20 14:35:42 +08:00
Mingqiang Chi
67871c42ea Add page mask MACRO
Add 'CPU_PAGE_MASK' used for calculate address,
Change IA32E_REF_MASK from 0x7ffffffffffff000 to 0x000ffffffffff000
for MMU/EPT entry, bit62:52(ignore) bit63(VE/XD)
if we want to obtain the address from the MMU/EPT entry,need to clear
bit63:52 by IA32E_REF_MASK

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-20 14:19:41 +08:00
Yonghua Huang
c63f21c4a8 align the coding style when access VMEXIT_QUAL
- align coding style to avoid redundant operations
   when operating on reading  VMX_EXIT_QUALIFICATION

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-03-19 16:36:22 +08:00
Li, Fei1
bd21cdb624 minor fix on get_ptdev_info
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-03-16 21:52:34 +08:00
Mingqiang Chi
bf8714b7e0 add create secure world ept API
This patch is prepared for enabling secure world feature.
this api will create new eptp for secure world, whose PDPT
entries are copied form normal world,the PML4/PDPT for secure
world are separated from Normal World, PD/PT are shared in the
Secure World's EPT and Normal World's EPT.Secure world can
access Normal World's memory, but Normal World can not access
Secure World's memory
This function implemented:
-- Unmap specific memory from guest ept mapping
-- Copy PDPT from Normal world to Secure world
-- Map specific memory for Secure world
-- Unmap specific memory from SOS ept mapping

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-16 21:52:15 +08:00
Li, Fei1
4f65dd477a Simple get_vmx_cap()
Don't check MSR Control Features in get_vmx_cap

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-03-15 16:33:08 +08:00
Li, Fei1
b0f8781500 Call monitor_cap_detect in bsp_boot_init
On the APL NUC board (CPU family: 0x6 model: 92), the monitor is buggy.
We can't use it to wake up CPU core from mwait by memory monitor.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-03-15 16:28:02 +08:00
Mingqiang Chi
78649c4a52 add data structure in vm for enable trusty feature
add key info structure
add sworld_eptp in vm structure, and rename ept->nworld_eptp
add secure world control structure

Change-Id:
Tracked-On:220921
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-15 16:26:55 +08:00
Jason Chen CJ
f61d7ed41f retpoline: add indirect thunk support
for gcc version > 7.3, enable CONFIG_RETPOLINE

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-03-15 16:25:53 +08:00
Jason Chen CJ
aaeb52577f vpic: use calloc to init vpic instead of malloc
vpic struct should be init as 0

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-03-15 16:25:53 +08:00
Jason Chen CJ
4b750331b1 uefi: restore cr registers according to efi context
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-03-15 16:25:53 +08:00
Yin Fengwei
9848000879 apicv: cancel event injection if vcpu is scheduled out
And re-inject the event after vcpu is scheduled in.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-03-15 16:24:13 +08:00
Jason Chen CJ
c865e427ad decouple hv sw version and api version
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-03-09 13:43:20 +08:00
Eddie Dong
f4cd4338fd initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-03-07 21:05:38 +08:00