This commit cleans up struct acrn_vcpu. vcpu API cleanup will be in
future patch series.
Create a common vcpu.h hosting struct acrn_vcpu, and move some x86
specific members of struct acrn_vcpu into struct acrn_vcpu_arch. These
members includes:
reg_cached
reg_updated
inst_ctxt
And pending_req is being moved from arch to common.
And the maximum number of events (i.e., VCPU_EVENT_NUM) are being
replaced by MAX_VCPU_EVENT_NUM.
To avoid circular dependency, some in-header helpers are moved into
vcpu.c with only prototypes being declared inside header.
Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Add stack protector implementation for RISC-V architecture using a
global __stack_chk_guard variable. This differs from x86 which uses
per-CPU stack canaries.
Tracked-On: #8834
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Stack canary implementation varies across architectures. x86 uses a
per-pCPU __stack_chk_guard while RISC-V uses a global variable shared
across all pCPUs. Move struct stack_canary from the common per_cpu
structure to per_cpu_arch to allow architecture-specific stack
protection implementations.
Tracked-On: #8834
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
add pgtable callbacks set_pgentry to implement arch specific
set generic page table entry for any paging level, and remove
x86 specific tweak_exe_right/recover_exe_right callbacks, move
the logic in set_pgentry callback.
remove common set_pgentry function to avoid confusing.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
move early_pgtable_map_uart and pgtable_create_trusty_root
to x86 code, and provide calling with x86 private header
pagemisc.h
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
this patch moves function xx_offset and xx_index to common code,
Add arch interface arch_quirk/arch_pgtle_page_vaddr and
arch_pgtle_large.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
move _page_table_level to common, and rename functions and
variables to comform with pgtln style
when we refer to pgtl0e, it means the lowest translation
table entry, while the "pte" refers generic page table entry.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
add x86 mm_common.h to map common macro name to x86 name
and chang them in common/mmu.c, replace XX_PFN_MASK with
PFN_MASK, since they are the same.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
The sanitized page is used to mitigate l1tf for x86, but sanitized_page_hpa
is the hpa used to set in the page table entry when delete or modify
page happens, it is by default is 0, other arch donot need to init it.
move this part to common for other arch to reuse it.
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
move struct pgtable and page_pool to common code and
move alloc_page/free_page/init_page_pool to common
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
move some funcitons like hpa2hva to common file.
change some files to include file from asm/pgtable.h to common/pgtable.h
Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
get_vm_from_vmid,is_paused_vm and is_poweroff_vm should be common APIs.
But now doesn't implement them as common for not introduce more VM related
data structure and APIs.
Tracked-On: #8805
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
MMIO read/write without memory order should be common ARCH, without
PIO support shouldn't use PIO APIs, so implement them as empty.
Tracked-On: #8807
Signed-off-by: Fei Li <fei1.li@intel.com>
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu <yifan1.liu@intel.com>
cpu_dead calls arch_cpu_dead, cpu_do_idle calls arch_cpu_do_idle,
arch_cpu_dead and arch_cpu_do_idle are required to be implemented by
each architecture.
Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Reviewed-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
move run_idle_thread and default_idle to schedule file as common
function.
Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
stack_frame is not only for vcpu thread, host thread needs
it, so move stack_frame out of vcpu file.
Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Reviewed-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
delivery mode and idle mode are x86 specific percpu, so move it from common to
x86 arch, also change the name of mode_to_idle to be idle_mode, change the name
of mode_to_kick_pcpu to be kick_pcpu_mode.
Tracked-On: #8812
Signed-off-by: Xue Bosheng <bosheng.xue@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Convert IRQ-related macros to static inline functions and introduce
wrappers for arch-specific implementations. This follows the style we
defined for multi-arch development.
This is a follow-up update for commit
a7239d126 ("[FIXME] hv: risc-v add denpended implementation in cpu.h").
CPU_IRQ_ENABLE_ON_CONFIG -> local_irq_enable
CPU_IRQ_DISABLE_ON_CONFIG -> local_irq_disable
CPU_INT_ALL_DISABLE -> local_irq_save
CPU_INT_ALL_RESTORE -> local_irq_restore
Tracked-On: #8813
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Yifan Liu <yifan1.liu@intel.com>
The following pcpu related interfaces are moved into common:
- common/cpu.c::start_pcpus
- include/common/cpu.h::get_pcpu_id
- include/common/cpu.h::set_current_pcpu_id
Their arch specific implementations are moved into arch/$(ARCH):
- arch/$(ARCH)/cpu.c::arch_start_pcpu
- include/arch/$(ARCH)/asm/cpu.h::arch_get_pcpu_id
- include/arch/$(ARCH)/asm/cpu.h::arch_set_current_pcpu_id
The following interface is moved into common:
- pcpu_set_current_state (from arch/x86/cpu.c -> common/cpu.c)
The following MACROs are moved into include/common/cpu.h:
- CPU_UP_TIMEOUT
- CPU_DOWN_TIMEOUT
- BSP_CPU_ID
- INVALID_CPU_ID
Tracked-On: #8791
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Extract common interface to include/lib/bits.h, and invoke the variant
implementation of arch.
Re-implement unlocked functions as C in common library.
Rename bitmap*lock() to bitmap*(), bitmap*nolock() to bitmap*non_atomic().
Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
extract common barrier interface to include/lib/barrier.h,
and invoke the variant implementation of arch.
Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Extract common interface to include/lib/spinlock.h, and invoke the
variant implementation of arch.
Refine assemble macro code in case that ASSEMBLER defined.
Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Move phys_cpu_num and pcpu_active_bitmap to common, which could be
only accessed by interfaces provided by smp.h.
v2->v3:
1. move ALL_CPUS_MASK/AP_MASK to common cpu.h
v1->v2:
1. preserve phys_cpu_num in x86 but implement arch_get_num_available_cpus()
to provide interface for common code to access.
2. change function name test_xx to check_xx
Tracked-On: #8801
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Move x86 architecture dependent per cpu data into a
seperate structure and embeded it in per_cpu_region.
caller could access architecture dependent member by
using prefix 'arch.'.
v2->v3:
move whose_iwkey, profiling_info and tsc_suspend to x86
v1->v2:
rebased on latest repo
Tracked-On: #8801
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Reviewed-by: Chen, Jian Jun<jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Since there is no common IPI abstraction, the arch_ prefix is redundant.
This patch renames the functions as follows:
- arch_send_dest_ipi_mask -> send_dest_ipi_mask
- arch_send_single_ipi -> send_single_ipi
Tracked-On: #8799
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
This patch:
- abstracts the common logic from existing x86 implementation
- moves x86-specific logic to arch/x86/notify.c
A new common/notify.{c,h} is introduced to provide a common SMP call framework for
multi-arch support in ACRN.
arch-specific files such as arch/{x86,riscv}/notify.c is aim to provide the
corresponding implementations respectively.
The framework provides the following common APIs:
- init_smp_call(): initialize the SMP call support during pCPU initialization
- handle_smp_call(): execute the SMP call notification handler
- smp_call_function(): trigger the SMP call request to target pCPUs
Other SW modules should invoke these common APIs to perform arch-independent
SMP operations.
Two arch-specific hooks are abstracted:
- arch_smp_call_kick_pcpu():
- On x86, special handling is required when LAPIC is passthrough.
- On RISC-V, a plain IPI is sufficient to kick the target pCPU.
- arch_init_smp_call():
- On x86, CPU initialization reserves dedicated vectors and
registers callback handlers for purposes such as notifications
or posted interrupts.
- On RISC-V, no special handling is required at present; this
can be extended in the future if needed.
----------
Changelog:
* Merged the following two patches into one:
[RFC PATCH v2 4/7] hv: introduce common/smp.{c,h}
[RFC PATCH v2 5/7] hv: smpcall: x86: adapt to common SMP call
Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Rename send_single_ipi() and send_dest_ipi_mask() to
arch_send_single_ipi() and arch_send_dest_ipi_mask() in x86, to make the
naming consistent with the RISC-V implementation and reflect that these
functions are arch-specific.
Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Align the prototype of send_dest_ipi_mask() on x86 with the RISC-V
definition. dest_mask is updated from uint32_t to uint64_t:
From: void send_dest_ipi_mask(uint32_t dest_mask, uint32_t vector)
To: void send_dest_ipi_mask(uint64_t dest_mask, uint32_t vector)
On RISC-V, send_dest_ipi_mask() is implemented using SBI interfaces,
where the dest_mask is defined as "unsigned long" in the SBI spec.
Tracked-On: #8786
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
The hypervisor image size is determined at link time, but now it is
calculated and stored in a global variable during mmu initialization,
and the helper function reads from that variable. Change to calculate
it inside helper function to avoid inconsistency.
Tracked-On: #8738
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
The VM-exit instruction length(VMX_EXIT_INSTR_LEN) in VMCS is undefined
on EPT violation, except during delivery of a software interrupt,
privileged software exception, or software exception[1]. Although CPU
is likely to set the field, it can be incorrect in certain cases, such
as cmp+jcc and test+jcc.
Since hypervisor does not know exactly how much bytes needed, and GVA
translation is costly, it first copies at most 15 (VIE_INST_SIZE) bytes
within the page, then decodes the instruction. If more bytes are needed
during decoding and copied length is less than 15, it copies remaining
bytes.
[1] 29.2.5, https://cdrdv2-public.intel.com/671200/325462-sdm-vol-1-2abcd-3abcd.pdf
Tracked-On: #8756
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
In current code process, hyperv data in struct vm_arch is never cleared
during VM shutdown and is retained to next VM launch. As the enabled
bit of hypercall_page msr is not clear, hypercall page might cause fatal
error such as Windows VM BSOD during VM restart and memory
remapping. Hyperv page destory function can ensure hyperv page is
destory during each VM shutdown so hyperv related config such as
hypercall page is established correctly during each VM launch.
Tracked-On: #8755
Signed-off-by: Yichong Tang <yichong.tang@intel.com>
Add reset_control in acrn_vm. Use this reset_control to simulate
RESET_CONTROL(0xCF9) register in hypervisor.
Tracked-On: #8724
Signed-off-by: Yuan Lu <yuan.y.lu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Service VM may write 0x6 to port 0xcf9 to trigger a warm reset, but
current hypervisor always performs a cold reset by writing 0xE to CF9.
Hypervisor should reboot the system in the same mode as Service VM
specified. Specific OS features (like linux pstore) requires warm
reset to keep data across reboot.
The behavior of hv console's reboot command (cold reset) remains
unchanged.
Tracked-On: #8539
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Per SDM, VPDPBUSD/VPDPBUSDS/VPDPWSSD/VPDPWSSDS instructions depend on
CPUID Feature Flag 'AVX-VNNI, AVX512_VNNI, AVX512VL'. 'AVX512_VNNI' and
'AVX512VL' are already exposed to any VM.
'AVX-VNNI' is in CPUID.(EAX=07H,ECX=1):EAX.AVX-VNNI[bit 4]. This patch
is to expose all the CPUID.EAX=07H subleaf features to VMs.
Mask corresponding bits if want to disable some features in the future.
Tracked-On: #8710
Reviewed-by: Fei Li <fei1.li@intel.com>
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
Determine the size of drhd_dev_scope based on DRHD_MAX_DEVSCOPE_COUNT
in board file instead of hardcoding. The current default value 16 will
be used if it is not defined in board file to keep compatibility, a
warning will be raised in this case.
Tracked-On: #8494
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
GAI Tooling Notice: These contents may have been developed with support from one
or more generative artificial intelligence solutions.
ACRN hypervisor is decomposed into a series of components and modules. The
module design in hypervisor is to add inline doxygen style comments above
functions, macros, structures, etc.
This patch is to add comments for some elements in hwmgmt_page module.
Tracked-On: #8665
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
1. Enable Service VM to power off or restart the whole platform even when RTVM is running.
2. Allow Service VM stop the RTVM using acrnctl tool with option "stop -f".
3. Add 'Service VM supervisor role enabled' option in ACRN configurator
Tracked-On: #8618
Signed-off-by: YuanXin-Intel <xin.yuan@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
