Commit Graph

47 Commits

Author SHA1 Message Date
Zide Chen
5420b34a26 hv: provide vm_config information in get_platform_info hypercall
Hypervisor reports VM configuration information to SOS which can be used to
dynamically allocate VCPU affinity.

Servise OS can get the vm_configs in this order:

1. call platform_info HC (set vm_configs_addr with 0) to get max_vms and
   vm_config_entry_size.
2. allocate memory for acrn_vm_config array based on the number of VMs
   and entry size that just got in step 1.
3. call platform_info HC again to collect VM configurations.

Tracked-On: #4616
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-16 13:46:27 +08:00
Li Fei1
e99ddf28c3 hv: vpci: handle the quirk part for pass through pci device cfg access in dm
There're some PCI devices need special handler for vendor-specical feature or
capability CFG access. The Intel GPU is one of them. In order to keep the ACRN-HV
clean, we want to throw the qurik part of PCI CFG asccess to DM to handle.

To achieve this, we implement per-device policy base on whether it needs quirk handler
for a VM: each device could configure as "quirk pass through device" or not. For a
"quirk pass through device", we will handle the general part in HV and the quirk part
in DM. For a non "quirk pass through device",  we will handle all the part in HV.

Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-03-20 10:08:43 +08:00
Li Fei1
e8479f84cd hv: vPCI: remove passthrough PCI device unuse code
Now we split passthrough PCI device from DM to HV, we could remove all the passthrough
PCI device unused code.

Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-02-24 16:17:38 +08:00
Li Fei1
fe3182ea05 hv: vPCI: add assign/deassign PCI device HC APIs
Add assign/deassign PCI device hypercall APIs to assign a PCI device from SOS to
post-launched VM or deassign a PCI device from post-launched VM to SOS. This patch
is prepared for spliting passthrough PCI device from DM to HV.
The old assign/deassign ptdev APIs will be discarded.

Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-02-24 16:17:38 +08:00
Victor Sun
5b1852e482 HV: add kata support on sdc scenario
In current design, devicemodel passes VM UUID to create VMs and hypervisor
would check the UUID whether it is matched with the one in VM configurations.

Kata container would maintain few UUIDs to let ACRN launch the VM, so
hypervisor need to add these UUIDs in VM configurations for Kata running.
In the hypercall of hcall_get_platform_info(), hypervisor will report the
maximum Kata container number it will support. The patch will add a Kconfig
to indicate the maximum Kata container number that SOS could support.

In current stage, only one Kata container is supported by SOS on SDC scenario
so add one UUID for Kata container in SDC VM configuration. If we want to
support Kata on other scenarios in the future, we could follow the example
of this patch;

Tracked-On: #3402

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-12 16:34:31 +08:00
Yonghua Huang
46480f6e23 hv: add new hypercall to fetch platform configurations
add new hypercall get platform information,
 such as physical CPU number.

Tracked-On: #2538
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-15 22:14:13 +08:00
Min Lim
ec4dd2284c profiling: enable to capture dropped samples while buffering
Since the profiling utilizes the limited size of buffer to capture
sample data, dropping samples could happen while collecting data
if data is generated faster than flushing by consumer. Capturing
the dropped sample info is critical to understand how much the data
is reliable to use.

To capture the information, the new hypercall "PROFILING_GET_STATUS"
is introduced.

Tracked-On: #2474
Signed-off-by: Manisha Chinthapally <manisha.chinthapally@intel.com>
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 11:44:04 +08:00
Victor Sun
49e6deaf26 HV: rename the term of vm0 to sos vm
Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Mingqiang Chi
49166fc3ac hv: passthrough: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast
-- Change union source_id

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Kaige Fu
1e3358fd92 Debug: Add one hypercall to quary hardware info
acrntrace/log kernel modules will use this hypercall to fetch
pcpu num of hardware platform. Then, initialize driver accordingly.

Tracked-On: #1775;#1776
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-12-20 18:48:38 +08:00
Zhao Yakui
e22b35e332 HV/DM: Unify the usage of aligned for structure definition with alignment
Now one macro is added to define the alignment requirement.
>#define __aligned(x) __attribute__((aligned(x)))

Some code uses the __aligned(x) to define the alignment while the other
code uses the original alignment definition.
So they are unified.

Tracked-On: projectacrn/acrn-hypervisor#2131
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 14:08:28 +08:00
Li, Fei1
605738fc0c hv: hypercall: remove hcall_set_vm_memory_region
Since it's discarded.

Tracked-On: #1124
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 13:04:27 +08:00
Yonghua Huang
05bb7aa212 hv: remove deprecated hypercalls
below hypercalls are wrapped to HC_SET_IRQLINE:
- HC_ASSERT_IRQLINE
- HC_DEASSERT_IRQLINE
- HC_PULSE_IRQLINE

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-30 09:59:27 +08:00
Chinthapally, Manisha
8ba333d275 HV: Added Initial support for SEP/SOCWATCH profiling
This patch adds support to sep/socwatch profiling
     Adds 2 new files include/arch/x86/profiling.h and arch/x86/profiling.c
     which contains most of the implementation for profiling,most of the functions
     in profiling.c have dummy implementation and will be implemented in next patches

     a. cpu.c, Initial profiling setup is done as part of bsp_boot_post
  and cpu_secondary_post flow
     b. vmcall.c, New ioctl is added for performing profiling related
  operations in vmcall_vmexit_handler
	ioctl - HC_PROFILING_OPS
        function - hcall_profiling_ops()
     c. common/hypercall.c, hcall_profiling_ops() implementation.
     d. hv_main.c, In vcpu_thread calling profiling related functions
  to save vm context
     e. acrn_hv_defs.h, list all the profiling command types

Tracked-On: projectacrn#1409
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Chinthapally, Manisha <manisha.chinthapally@intel.com>
2018-10-26 13:39:07 +08:00
Wei Liu
96412ac147 hv: add suffix(U/UL) to come up MISRA-C into include
MISRA-C required the suffix(U/UL), such as:
(1) ---> (1U)
(1) ---> (1UL)
(1U << 0) ---> (1U << 0U)
This patch will add the suffix(U/UL) to come up MISRA-C into
hypervisor/include directory.

Tracked-On: #1468
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 22:33:30 +08:00
Yin Fengwei
3cfbc004f5 hv: add hypercall to set vcpu init state
DM will use this hypercall to initialize the UOS BSP state.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:10 +08:00
Yonghua Huang
dd6a5fbe95 HV: Add hypercall to set/clear IRQ line
- wraps ASSERT/DEASSERT IRQ line hypercalls.
    - remove 'intr_type' from set/clear IRQ line interface.
    - deprecate "IRQ_ASSERT", "IRQ_DEASSERT" & "IRQ_PULSE".
    - new adding hypercall will support "GSI_SET_HIGH"/
      "GSI_SET_LOW"/ "GSI_RAISING_PULSE"/ "GSI_FALLING_PULSE"
      operations

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 16:49:52 +08:00
Zhao Yakui
a189be26ff HV: Add one hcall to set the upcall vector passed from sos_kernel
Currently the acrn-hypervisor is using the PLATFORM_IPI vector to notify
the sos_kernel. And then sos_kernel will handle the notification from acrn
hypervisor in PLATFORM_IPI ISR. But as the PLATFORM_IPI ISR can be registered
by the other modules, it will have the conflict when trying to register
acrn intr ISR. So the HYPERVISOR_CALLBACK_VECTOR will be used instead.

In order to switch the notification vector from PLATFORM_IPI to
HYPERVISOR_CALLBACK_VECTOR, one API is added so that sos can configure
the up-notifier interrrupt vector.

Tracked-On: https://github.com/projectacrn/acrn-hypervisor/issues/1325
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 11:23:34 +08:00
Minggui Cao
d123083fa9 HV: add hypercall to monitor UOS PTdev intr status
The hypercall can be used by SOS/DM to monitor UOS
pass-thru devices' interrupt data; and if an "interrupt
storm" happens in UOS, it can be used to delay the UOS
PTdev interrupt's injection for sometime.

The two functions are implemented by one hypercall with
two sub-commands, and with the data/params in the buffer.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-25 11:09:35 +08:00
Shiqing Gao
9d602208e5 hv: remove unused MACROs
MISRA-C states that redundant macros reduce the maintainability of code.

In some cases, we would like to keep the current unused macros for code
completeness, such as cpu registers. These macros might be used later.

This patch removes some unused macros that is not critical for code
completeness.

v1 -> v2:
 * Keep TRUSTY_VERSION in trusty.c.
   Yadong will cook another patch which will utilize TRUSTY_VERSION.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:43 +08:00
Zhi Jin
dcae438306 hv: add a hypercall for the hypervisor NPK log
The hypercall HC_SETUP_HV_NPK_LOG is added to enable/disable/configure
the hypervisor NPK log.

Signed-off-by: Zhi Jin <zhi.jin@intel.com>
Signed-off-by: Zhonghua Sun <zhonghua.sun@intel.com>
Reviewed-by: CHEN Gang <gang.c.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-23 11:09:25 +08:00
Junjun Shan
ca83c09b9f hv: treewide: fix multiple MISRAC violations
MISARC has requirements about  Marco redefinition, usage of ++ or -- and
assignment operator in boolean expression. This patch is used to solve
these violations.

The modifications are summarized as following:
1.The HC_VM_SET_MEMORY_REGION, HC_VM_GPA2HPA, HC_VM_SET_MEMORY_REGIONS are
redefined twice in acrn_hv_des.h, so delete them to solve the macro
redefinition violations.

2.The macro BUS_LOCK are redefined in bits.h and atomic.h, then delete
the declaration in both two files, add a new declaration in cpu.h and
include the header file.

3.modify the code to solve the improper usage of -- operators in string.c.

4.modify the while loop to for loop to avoid assignment operator in
boolean expression in vlapic.c.

v1 -> v2:
 *Modify the format of commit logs and signed-off name.

 *Modify the code format from 'd = d-1;' to 'd--;' to be better.

Signed-off-by: Junjun Shan <junjun.shan@intel.com>
2018-08-15 11:21:09 +08:00
Qi Yadong
2fc3bdec40 HV: trusty: new hypercall to save/restore context of secure world
New field in VM's structure:
    sworld_snapshot: save cpu_context of secure world.

New hypercall: HC_SAVE_RESTORE_SWORLD_CTX
    In UOS S3 suspend path: trusty kernel driver will call this hypercall
    to require Hypervisor save context of secure world.
    In UOS S3 resume path: virtual firmware will call this hypercall to
    require Hypervisor restore context of secure world.

New bit in secure_world_control.flag:
    ctx_saved: indicate whether cpu_context of secure world is saved.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Qi Yadong
9ba14dac31 HV: trusty: remove unused HC ID
The security information will not pass to HV through Hypercall,
so remove the unused HC_GET_SEC_INFO.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Yin Fengwei
f576f97ea8 hv: add vm restart API
And export the API to DM. DM will do system reboot/S3 resume based
on this API.

Also add the pre-assumption description for some vm APIs.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-02 13:14:03 +08:00
Arindam Roy
a2fe964de8 HV: Rename functions beginning with "_"
V1:
In order to remove MISRA C violations for rule
219S, rename functions, macros whose name
starts with "_".
Also removed some __mmio functions because they are
duplicates and are not used anywhere.
Renamed functions like __assert, to asm_assert,
because they were only wrappers around asm calls.

V2:
Over and above the changes on V1, modified bitmap
functions names to lock (corresponding to unlock)
introduced in V1

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-30 10:11:54 +08:00
Li, Fei1
34c6862a28 hv: hypercall: add support to change guest page write permission
Add hcall_change_vm_page_wp_perm to change guest one page write permission.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-26 12:46:34 +08:00
Jason Chen CJ
2dca23c7c9 add hypercall hc_sos_offline_cpu support
SOS boot with all physicall cpus, before running UOS, it should free
CPU resource by offline not used cpus
- first do standard cpu offline flow
- then call hcall_sos_offline_cpu hypercall to release cpu resource really

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Li, Fei1
502e3e2e65 hv: mmu: refine set guest memory region API
1. rename set_vm_memmap to set_vm_memory_region
2. split ept_mmap into ept_mr_add and ept_mr_del

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-24 12:48:45 +08:00
Junjie Mao
3571afc683 HV: hypercall: revisit types in structure parameters
While fixing the MISRA C violations related to integral types, we have unified
the type of the following data:

    uint8_t:
        phys_pin, virt_pin, vpic_pin, ioapic_pin, vioapic_pin

    uint16_t:
        vm_id, pcpu_id, vcpu_id, vpid

    uint32_t:
        vector, irq

This patch revisits the types of the fields in vhm_request as well as the
structures used as parameters in the hypercalls, and make them aligned with the
types the hypervisor uses for such data. Reserved fields are added to keep the
size and layout of the structures. Implicit paddings are also made explicit as
reserved fields.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-19 14:38:15 +08:00
Huihuang Shi
f2774e496b HV:common:fix "integer type violations"
fix integer type violations,keep some violations which
related to hypcall and msix_entry_index.

V1->V2:1.modified API_MAJOR_VERSION from Makefile
       2.sync acrn_common.h changed to device model

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:31:14 +08:00
Huihuang Shi
680c64de13 HV:transfer vmid's type to uint16_t
vmid's type prefered to be uint16_t.

V1->V2:vmid from uint32_t transfer to uint16_t
V2->V3:add range check to hcall's vmid parameter
V3->V4:seperate the declaration and actual code.
V4->V5:remove range check from hcall's vmid parameter

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 14:13:38 +08:00
Qi Yadong
202bc541b6 HV: trusty: revise trusty_boot_param structure
Per new design of trusty memory allocation: VHM will reserve contiguous
memory for trusty when DM launch guest with trusty enabled. And OSloader
will relocate trusty to 511G directly and pass trusty's base/entry to HV
by trusty_boot_param when call HC_INIITIALIZE_TRUSTY.

So in this patch:
  1. Extend trusty_boot_param to support addr/entry above 4G.
  2. Remove size check for old version compatibility.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
2018-07-12 17:30:26 +08:00
Xiangyang Wu
f81fcf2f07 HV:MM:add 'U/UL' suffix for unsigned contant value
In the current memory module, there are many constatn value
without U/UL suffix, it is reported as MISRA C violations by
static analysis tool.

Add 'U/UL' suffix for unsigned contant value in memory module
as needed.

Note:In the most case, CPU_PAGE_SIZE(0x1000) is used as
unsigned integer contant value, so CPU_PAGE_SIZE is defined
as unsigned integer contant value, and it is safety converted
into unsigned long type according to MISRA C standard.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-11 09:23:03 +08:00
Xiangyang Wu
49d1dc1534 HV:treewide: Clean up -1U or -1UL
According to C99 standard, -1 integer constant with 'U/UL'
suffix has no type.

To explicit the integer constant:
Update -1U or -1UL as ~0U or ~0UL, or invalid number according
to usage case.

V1-->V2:
	Update parameter name and type of send_startup_ipi since
	the second parameter is used as pcpu_id;
	Update related comments for code clearity.
V2-->V3:
	Update comments of struct acrn_irqline;
	rename  cpu_startup_dest as dest_pcpu_id in the second
	parameter of send_startup_ipi.

Tracked-on: ccm0001001-247033
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 10:27:33 +08:00
Qi Yadong
3e2d1fba6b HV: trusty: Get rpmb_key from OSloader when init trusty
Extend struct trusty_boot_param to hold rpmb_key.
Copy rpmb_key from trusty_boot_param when initialize
trusty.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Reviewed-by: Zhu Bing <bing.zhu@intel.com>
Reviewed-by: Wang Kai <kai.z.wang@intel.com>
2018-07-09 13:09:18 +08:00
Xiangyang Wu
3027bfab10 HV: treewide: enforce unsignedness of pcpu_id
In the hypervisor, physical cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about  physical cpu id (pcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

In this patch, define physical cpu id as "uint16_t" type for all
modules in the hypervisor and change related codes. The valid
range of pcpu_id is 0~65534, INVALID_PCPU_ID is defined to the
invalid pcpu_id for error detection, BROADCAST_PCPU_ID is
broadcast pcpu_id used to notify all valid pcpu.

The type of pcpu_id in the struct vcpu and vcpu_id is "int" type,
this will be fixed in another patch.

V1-->V2:
    *  Change the type of pcpu_id from uint32_t to uint16_t;
    *  Define INVALID_PCPU_ID for error detection;
    *  Define BROADCAST_PCPU_ID to notify all valid pcpu.

V2-->V3:
    *  Update comments for INVALID_PCPU_ID and BROADCAST_PCPU_ID;
    *  Update addtional pcpu_id;
    *  Convert hexadecimals to unsigned to meet the type of pcpu_id;
    *  Clean up for MIN_PCPU_ID and MAX_PCPU_ID, they will be
       defined by configuration.
Note: fix bug in the init_lapic(), the pcpu_id shall be less than 8,
this is constraint by implement in the init_lapic().
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 16:59:21 +08:00
Junjie Mao
aa505a28bb HV: treewide: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Wang, Hongbo
f757d49ead
Merge pull request #322 from dbkinder/api-spell
doc: fix API documentation misspellings
2018-06-12 07:45:21 +08:00
David B. Kinder
f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
David B. Kinder
69af3a901b doc: fix API documentation misspellings
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-30 13:11:22 -07:00
Zide Chen
8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Jason Chen CJ
71e1ae17ce hypercall: add set_memmaps hypercall support
Add set_memmaps hypercall to support multi regions memmap.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 15:34:18 +08:00
Victor Sun
1d0d4d3185 HV: add hypercall interface of get vcpu state data
We can use this interface for VHM to pass per-cpu power state data
to guest per its request.

For now the vcpu power state is per-vm, this could be changed if
per-cpu power state support is required in the future.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:25 +08:00
Qi Yadong
b124e0da28 trusty: implement hypercall to initialize trusty
UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY.
UOS_Loader will load trusty image and alloc runtime memory for
trusty. UOS_Loader will transfer these information include
trusty runtime memory base address, entry address and memory
size to hypervisor by trusty_boot_param structure.

In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create
EPT for Secure World, save Normal World vCPU context, init
Secure World vCPU context and switch World state to Secure World.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:39 +08:00
Qi Yadong
1fd07ba349 trusty: Simulate Secure Monitor Call(SMC) by Hypercall
For ARM, The SMC instruction is used to generate a synchronous
exception that is handled by Secure Monitor code running in EL3.
In the ARM architecture, synchronous control is transferred between
the normal Non-secure state and the Secure state through Secure
Monitor Call exceptions. SMC exceptions are generated by the SMC
instruction, and handled by the Secure Monitor.The operation of
the Secure Monitor is determined by the parameters that are passed
in through registers.

For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU
State between Normal World and Secure World.
There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters
passing between Normal World and Secure World.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:38 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00