Commit Graph

8 Commits

Author SHA1 Message Date
Mingqiang Chi
de5277fb3e hv: Save secure world memory info into vm instead of vm0
A bugfix for saving secure world memory info.
Maybe there are multiple UOS, each VM has its own secure
world and normal world, should save memory info into individual VM.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:19:39 +08:00
Rusty Lynch
80a7dda419 Fix compile error caused by missing memcpy function
On some toolchain configurations direct struct assignments will
default to a memcpy operation which is not present in this
environment, so explicitly use the internal memcpy_s function.

Signed-of-by: Rusty Lynch <rusty.lynch@intel.com>
2018-05-15 17:19:39 +08:00
Qi Yadong
8d67f292ef Rename TIME_MS_DELTA to CYCLES_PER_MS
TIME_MS_DELTA is not clear enough, rename it to CYCLES_PER_MS.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:39 +08:00
Qi Yadong
922daae198 trusty: add key_info for trusty bring-up
For trusty bring-up, key_info is needed.
Currently, bootloader did not transfer key_info to hypervisor.
So in this patch, use dummy key_info temporarily.

Derive vSeed from dSeed before trusty startup, the vSeed will
bind with UUID of each VM.

Remove key_info from sworld_control structure.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:39 +08:00
Qi Yadong
b124e0da28 trusty: implement hypercall to initialize trusty
UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY.
UOS_Loader will load trusty image and alloc runtime memory for
trusty. UOS_Loader will transfer these information include
trusty runtime memory base address, entry address and memory
size to hypervisor by trusty_boot_param structure.

In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create
EPT for Secure World, save Normal World vCPU context, init
Secure World vCPU context and switch World state to Secure World.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:39 +08:00
Qi Yadong
1fd07ba349 trusty: Simulate Secure Monitor Call(SMC) by Hypercall
For ARM, The SMC instruction is used to generate a synchronous
exception that is handled by Secure Monitor code running in EL3.
In the ARM architecture, synchronous control is transferred between
the normal Non-secure state and the Secure state through Secure
Monitor Call exceptions. SMC exceptions are generated by the SMC
instruction, and handled by the Secure Monitor.The operation of
the Secure Monitor is determined by the parameters that are passed
in through registers.

For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU
State between Normal World and Secure World.
There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters
passing between Normal World and Secure World.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:38 +08:00
Mingqiang Chi
2deb4cb458 mmu: Rename several variables related to page table type
rename 'PT_HOST' to 'PTT_HOST'
rename 'PT_EPT' to 'PTT_EPT'
rename 'ept_type' to 'table_type'

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:19:37 +08:00
Mingqiang Chi
c451f2e4fa add create secure world ept API
This patch is prepared for enabling secure world feature.
this api will create new eptp for secure world, whose PDPT
entries are copied form normal world,the PML4/PDPT for secure
world are separated from Normal World, PD/PT are shared in the
Secure World's EPT and Normal World's EPT.Secure world can
access Normal World's memory, but Normal World can not access
Secure World's memory
This function implemented:
-- Unmap specific memory from guest ept mapping
-- Copy PDPT from Normal world to Secure world
-- Map specific memory for Secure world
-- Unmap specific memory from SOS ept mapping

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:19:36 +08:00