Commit Graph

21 Commits

Author SHA1 Message Date
Huihuang Shi
f92931c879 HV:common:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Huihuang Shi
977c4b20b5 fix parted of "missing for discarded return value"
MISRA C required that return value should be used, missing for it should
add "(void)" prefix before the function call.
Some function can be declared without return value to avoid this problem.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 16:21:45 +08:00
Zheng, Gen
a06f2d68dc HV: bug fix in operating softirq
Current code is missing to handle the following race condition:

   Before:

     sti
      |
      V
handle softirq with
a while loop
      |          <----- if a new softirq generated at this point,
      V                 it will be missed to be handled.
     cli
      |
      V
return with unclear softirq bitmap

    After:

again:
     sti
      |
      V
handle softirq with
a while loop
      |
      V
     cli
      |
      V
check if a new softirq generated, if yes,
jump back to above again lable point,
and do a while loop again.
      |
      V
return with clear softirq bitmap

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-14 13:41:12 +08:00
Yin Fegnwei
7a71422a6d hv: handle cpu offline request in idle thread
Change need_scheduled fileds of schedule context to flags because
it's not only used for need_schedule check.

Add two functions to request/handle cpu offline.

The reason we only handle cpu offline request in idle thread is
that we should pause the vcpu running on target pcpu. Then it's
only possible that target pcpu get cpu offline request in idle
thread.

Signed-off-by: Yin Fegnwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-07 15:36:46 +08:00
Yin Fegnwei
08139c34f7 hv: add vmx_off and update exec_vmxon_instr
To handle cpu down/up dynamically, arcn needs to support vmx off/on
dynamically. Following changes is introduced:
  vmx_off will be used when down AP. It does:
    - vmclear the mapped vcpu
    - off vmx.

  exec_vmxon_instr is updated to handle start and up AP both. It does
    - if vmx was on on AP, load the vmxon_region saved. Otherwise,
      allocate vmxon_region.
    - if there is mapped vcpu, vmptrld mapped vcpu.

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Yin Fegnwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-07 15:36:46 +08:00
Huihuang Shi
e591315a65 HV:treewide:C99-friendly per_cpu implementation change the per_cpu method
The current implementation of per_cpu relies on several non-c99 features,
and in additional involves arbitrary pointer arithmetic which is not MIS-
RA C friendly.

This patch introduces struct per_cpu_region which holds all the per_cpu
variables. Allocation of per_cpu data regions and access to per_cpu vari-
ables are greatly simplified, at the cost of making all per_cpu varaibl-
es accessible in files.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-06-05 17:09:00 +08:00
David B. Kinder
f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Li, Fei1
e0c329e4e9 hv: create vm failed don't panic system
Just return error number to the caller.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1
6c8fc0a4df hv: remove vm_description_array
When we create an UOS, we didn't indicate the vmid.
Thus we can't get the vm description for the vm
description array.

Instead we use a temporary vm description to save data to
fill the vm structure when crate an UOS. It's uselesss once
UOS has created. So we don't need to maintain vm description
array here for UOS.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1
3fb7b75eda hv: execute vmxon instruction fail don't panic system
Don't panic system when execute vmxon instruction failed.
And let's follow that only print error info when error return
from library function.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1
fe4484f5a9 hv: move panic out of hv_main
We cleanup ASSERT. This serial try to only panic when create
SOS failed.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Jason Chen CJ
75a03bf0f7 exception: use func vcpu_queue_exception to inject exception
use func vcpu_queue_exception for vcpu_inject_gp and exception_vmexit_handler.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
44af2690f6 add triple fault request support
if vcpu meet triple fault, the vcpu should exit.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
4607177383 replace pending_intr with pending_req
the pending_intr is not only serving for interrupt but also for different
request including TLB & TMR updating, so change the function & variants
name accordingly.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-30 13:51:49 +08:00
Zide Chen
8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Jason Chen CJ
67dfec8799 vmexit: refine vmexit loop
- move vmexit handling into vmexit_handler
- add error handling, failure will inject #GP

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 13:42:19 +08:00
Li, Fei1
1b1f723c7b hv: add hardware_detect_support to detect which hardware we support
Now just add some basic feature/capability detect (not all). Vapic
didn't add here for if we must support vapic then the code which
for vapic not supported must remove, like mmio apic r/w.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:56 +08:00
Yonghua Huang
11d0e59b3e revise type of 'exit_reason' and 'inst_len' in vcpu_arch
SDM 24.9.1 Volume3:
 - 'Exit reason' field in VMCS is 32 bits.

 SDM 24.9.4 in Volume3
 - 'VM-exit instruction length' field
   in VMCS is 32 bits.

 This patch is to redefine the data types of above fields
 in 'struct vcpu_arch' and udpate the code using these
 two fields.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:55 +08:00
Li, Fei1
6560ff367c hv: cpu: add cpu_has_cap() API
Add cpu_has_cap API for cpu feature/capability detect instead of
add get_xxx_cap for each feature/capability detect.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
Li, Fei1
74e2bfc15f Simple get_vmx_cap()
Don't check MSR Control Features in get_vmx_cap

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:36 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00