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4a6bc369ad
GPIO set/get value can be operated by accessing PIO space and the PIO
register definition for GPIO is in gpio_dm.h, frontend driver or ACPI
control methods can operate GPIO based on it.
GPIO mediator also defines ACPI control methods to support GPIO
operations, GPIO consumers can invoke PIO_GPIO_SET_VALUE/PIO_GPIO_GET_VALUE
in their own DSDT to set/get one GPIO value via ACPI control method.
v2: 1) Fix code style.
2) Use virtio configuration space callbacks to implement GPIO PIO operations
that replace pci_gpio_read/pci_gpio_write with virtio_cfgread/virtio_cfgwrite.
3) Return 0xFFFFFFFF as invalid result of PIO reading instead 0.
Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
39 lines
1.0 KiB
C
39 lines
1.0 KiB
C
/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef _GPIO_DM_H_
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#define _GPIO_DM_H_
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/*
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* GPIO PIO register definition
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*
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* +---------------+----------+------+-----------+-------+
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* | Configuration | Reserved | Mode | Direction | value |
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* | 16b | 13b | 1b | 1b | 1b |
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* +---------------+----------+------+-----------+-------+
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*/
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#define PIO_GPIO_VALUE_MASK 0x1
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#define PIO_GPIO_DIR_OFFSET 1
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#define PIO_GPIO_DIR_MASK (0x1 << PIO_GPIO_DIR_OFFSET)
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#define PIO_GPIO_MODE_OFFSET 2
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#define PIO_GPIO_MODE_MASK (0x1 << PIO_GPIO_MODE_OFFSET)
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#define PIO_GPIO_CONFIG_OFFSET 16
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#define PIO_GPIO_CONFIG_MASK (0xff << PIO_GPIO_CONFIG_OFFSET)
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/* PIO GPIO control method support */
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#define PIO_GPIO_CM_GET "GPCG"
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#define PIO_GPIO_CM_SET "GPCS"
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/* PIO GPIO operations support */
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#define PIO_GPIO_SET_VALUE(number, value) \
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PIO_GPIO_CM_SET"("#number","#value")"
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#define PIO_GPIO_GET_VALUE(number) \
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PIO_GPIO_CM_GET"("#number")"
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#endif
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