mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-08-01 07:49:39 +00:00
b7e4c69374
add TSN device OTN1 config into offline ACPI table for TSN device passthrough to pre-launched RTVM. v2) update TSN device list from bdf list to vid:pid list. Tracked-On: #5266 Signed-off-by: Shuang Zheng <shuang.zheng@intel.com> Acked-by: Victor Sun <victor.sun@intel.com>
65 lines
2.1 KiB
Plaintext
65 lines
2.1 KiB
Plaintext
/*
|
|
* Intel ACPI Component Architecture
|
|
* AML/ASL+ Disassembler version 20180105 (64-bit version)
|
|
* Copyright (c) 2000 - 2018 Intel Corporation
|
|
*
|
|
* Original Table Header:
|
|
* Signature "DSDT"
|
|
* Length 0x00000102 (258)
|
|
* Revision 0x03
|
|
* Checksum 0x08
|
|
* OEM ID "ACRN "
|
|
* OEM Table ID "ACRNDSDT"
|
|
* OEM Revision 0x00000001 (1)
|
|
* Compiler ID "INTL"
|
|
* Compiler Version 0x20180105 (538444037)
|
|
*/
|
|
DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001)
|
|
{
|
|
Scope (_SB)
|
|
{
|
|
Device (OTN1)
|
|
{
|
|
Name (_ADR, 0x00020000) // _ADR: Address
|
|
OperationRegion (TSRT, PCI_Config, Zero, 0x0100)
|
|
Field (TSRT, AnyAcc, NoLock, Preserve)
|
|
{
|
|
DVID, 16,
|
|
Offset (0x10),
|
|
TADL, 32,
|
|
TADH, 32
|
|
}
|
|
}
|
|
|
|
Device (PCS2)
|
|
{
|
|
Name (_HID, "INTC1033") // _HID: Hardware ID
|
|
Name (_UID, Zero) // _UID: Unique ID
|
|
Method (_STA, 0, NotSerialized) // _STA: Status
|
|
{
|
|
Return (0x0F)
|
|
}
|
|
|
|
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
|
|
{
|
|
Name (PCSR, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite,
|
|
0x00000000, // Address Base
|
|
0x00000004, // Address Length
|
|
_Y00)
|
|
Memory32Fixed (ReadWrite,
|
|
0x00000000, // Address Base
|
|
0x00000004, // Address Length
|
|
_Y01)
|
|
})
|
|
CreateDWordField (PCSR, \_SB.PCS2._CRS._Y00._BAS, MAL0) // _BAS: Base Address
|
|
MAL0 = ((^^OTN1.TADL & 0xFFFFF000) + 0x0200)
|
|
CreateDWordField (PCSR, \_SB.PCS2._CRS._Y01._BAS, MDL0) // _BAS: Base Address
|
|
MDL0 = ((^^OTN1.TADL & 0xFFFFF000) + 0x0204)
|
|
Return (PCSR) /* \_SB_.PCS2._CRS.PCSR */
|
|
}
|
|
}
|
|
}
|
|
}
|