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Add following to default output scenarios vm_configurations.c: - pci_dev_num - pci_devs = sos_pci_devs Both was defineded in CONFIG_SOS_VM. Tracked-On: #5426 Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
165 lines
3.5 KiB
C
165 lines
3.5 KiB
C
/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <vm_config.h>
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#include <vuart.h>
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#include <pci_dev.h>
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extern struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM];
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extern struct pt_intx_config vm0_pt_intx[1U];
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struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
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{ /* VM0 */
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CONFIG_SOS_VM,
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.name = "ACRN SOS VM",
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/* Allow SOS to reboot the host since there is supposed to be the highest severity guest */
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.guest_flags = 0UL,
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#ifdef CONFIG_RDT_ENABLED
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.clos = VM0_VCPU_CLOS,
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#endif
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.cpu_affinity = SOS_VM_CONFIG_CPU_AFFINITY,
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.memory = {
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.start_hpa = 0UL,
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.size = CONFIG_SOS_RAM_SIZE,
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},
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.os_config = {
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.name = "ACRN Service OS",
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.kernel_type = KERNEL_BZIMAGE,
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.kernel_mod_tag = "Linux_bzImage",
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.bootargs = SOS_VM_BOOTARGS,
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},
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = SOS_COM1_BASE,
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.irq = SOS_COM1_IRQ,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = SOS_COM2_BASE,
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.irq = SOS_COM2_IRQ,
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.t_vuart.vm_id = 2U,
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.t_vuart.vuart_id = 1U,
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},
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.pci_dev_num = 0U,
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.pci_devs = sos_pci_devs,
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},
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{ /* VM1 */
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CONFIG_POST_STD_VM(1),
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#ifdef CONFIG_RDT_ENABLED
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.clos = VM1_VCPU_CLOS,
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#endif
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.cpu_affinity = VM1_CONFIG_CPU_AFFINITY,
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = COM1_BASE,
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.irq = COM1_IRQ,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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},
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{ /* VM2 */
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CONFIG_POST_RT_VM(1),
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#ifdef CONFIG_RDT_ENABLED
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.clos = VM2_VCPU_CLOS,
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#endif
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.cpu_affinity = VM2_CONFIG_CPU_AFFINITY,
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = COM1_BASE,
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.irq = COM1_IRQ,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = COM2_BASE,
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.irq = COM2_IRQ,
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.t_vuart.vm_id = 0U,
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.t_vuart.vuart_id = 1U,
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},
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},
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{ /* VM3 */
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CONFIG_POST_STD_VM(2),
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#ifdef CONFIG_RDT_ENABLED
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.clos = VM3_VCPU_CLOS,
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#endif
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.cpu_affinity = VM3_CONFIG_CPU_AFFINITY,
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = COM1_BASE,
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.irq = COM1_IRQ,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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},
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{ /* VM4 */
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CONFIG_POST_STD_VM(3),
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#ifdef CONFIG_RDT_ENABLED
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.clos = VM4_VCPU_CLOS,
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#endif
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.cpu_affinity = VM4_CONFIG_CPU_AFFINITY,
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = COM1_BASE,
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.irq = COM1_IRQ,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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},
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{ /* VM5 */
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CONFIG_POST_STD_VM(4),
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#ifdef CONFIG_RDT_ENABLED
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.clos = VM5_VCPU_CLOS,
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#endif
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.cpu_affinity = VM5_CONFIG_CPU_AFFINITY,
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = COM1_BASE,
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.irq = COM1_IRQ,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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},
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{ /* VM6 */
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CONFIG_POST_STD_VM(5),
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#ifdef CONFIG_RDT_ENABLED
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.clos = VM6_VCPU_CLOS,
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#endif
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.cpu_affinity = VM6_CONFIG_CPU_AFFINITY,
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = COM1_BASE,
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.irq = COM1_IRQ,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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},
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{ /* VM7 */
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CONFIG_KATA_VM(1),
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#ifdef CONFIG_RDT_ENABLED
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.clos = VM7_VCPU_CLOS,
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#endif
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.cpu_affinity = VM7_CONFIG_CPU_AFFINITY,
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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},
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};
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